Semiconductor device and method of manufacturing the same

ABSTRACT

Hexachlorodisilane (Si 2 Cl 6 ) is used as a Si raw material for forming a silicon nitride film that can be widely different in the etching rate from a silicon oxide film. The silicon nitride film is formed by an LPCVD method.

This is a division of application Ser. No. 09/478,369, filed Jan. 6,2000 now U.S. Pat. No. 6,333,547, which is incorporated herein byreference.

BACKGROUND OF THE INVENTION

The present invention relates to a semiconductor device including asilicon nitride film containing chlorine and a method of manufacturingthe same.

With progress in the degree of integration and fineness of thesemiconductor device, a semiconductor device of the next era makes itabsolutely necessary to develop a process technology that permitsforming an interlayer insulating film (SiO₂ film) having a finer contacthole of a higher aspect ratio, that permits forming a uniform siliconnitride film of a high step coverage within the contact hole made in theinterlayer insulating layer, and that permits polishing the siliconnitride film by a chemical mechanical polishing (CMP) to achieve aburied shape of the silicon nitride film as designed and having a highflatness.

The particular technology is employed in the case of forming a devicestructure as shown in, for example, FIG. 33 showing a cross section in adirection perpendicular to the longitudinal direction of the channel ofa MOS transistor included in a DRAM cell.

In the structure shown in FIG. 33, a drain diffusion layer 682 is formedin a surface region of a silicon substrate 681. Also, an interlayerinsulating film (SiO₂ film) 685 is formed on the surface of the siliconsubstrate 681. A contact hole 683 and a wiring trench 684 connected tothe drain diffusion layer 682 through the contact hole 683 are formed inthe interlayer insulating film 685.

A buried wiring 686 made of tungsten is formed to fill the contact hole683 and a lower portion of the wiring trench 684. Also, a siliconnitride film 687 is formed on the side walls of the contact hole 683 andthe lower portion of the wiring trench 684.

The buried wiring 686 is formed to fill completely the contact hole 683and to fill only the lower portion of the wiring trench 684. An upperportion of the wiring trench 684, which is not filled with the buriedwiring 686, is filled with a silicon nitride film 688. The siliconnitride film 688 of this kind is called a cap insulating film. The capinsulating film is intended to prevent short-circuiting between a lowercapacitor electrode 689 formed on the cap insulating film and the buriedwiring 686.

The cap insulating film is used as a mask in the step of forming by RIE(Reactive Ion Etching) a contact hole for the capacitor, i.e., a contacthole for connecting the lower capacitor electrode to an n⁺-type sourcediffusion layer, in the interlayer insulating film (SiO₂ film) 685.Therefore, the silicon nitride film 688, which exhibits a highselectivity ratio, is used as the cap insulating film.

A Ti/TiN laminate film 690 is formed as a barrier metal film at thebottom of the contact hole 683 so as to prevent reaction between thedrain diffusion layer 682 and the buried wiring 686 in the subsequentheat treating step.

Where the wiring trench 684 has an aspect ratio not smaller than 1, itwas customary to form the silicon nitride film (DCS-SiN film) 688 by alow pressure chemical vapor deposition method (LPCVD method), which is aCVD method having a good step coverage and performed by usingdichlorosilane (DCS) as the Si raw material.

However, the conventional method described above gives rise to problemsas pointed out below.

First of all, a ratio of the polishing rate by CMP of the interlayerinsulating film (SiO₂) 685 to the DCS-SiN film 688 is about 30, which isnot sufficiently high. Therefore, in the step of removing by CMP anexcess DCS-SiN film 688 outside the wiring trench 684, the interlayerinsulating film 685 fails to perform the function of a stopper. As aresult, the DCS-SiN film 688 is excessively polished. In this case, thethickness of the DCS-SiN film 688 is rendered thinner than the designvalue, as shown in FIG. 34, giving rise to problems. For example,leakage current between the buried wiring 686 and the lower capacitorelectrode 689 is increased. Also, the breakdown voltage is lowered.

What should also be noted is that, in forming the contact hole for thecapacitor by etching, the DCS-SiN film 688 is used as a mask. If theDCS-SiN film 688 is excessively polished, short-circuiting is broughtabout in the worst case between the buried wiring 686 and the lowercapacitor electrode 689, as shown in FIG. 35.

In recent years, demands for an improvement in the degree of integrationand operating speed of a semiconductor device are on a sharp increase.To meet these demands, vigorous efforts are being made in an attempt toshorten the distance between adjacent device elements and to miniaturizethe device element. At the same time, vigorous studies are being made inan attempt to decrease the resistance of the buried wiring and todiminish the parasitic capacitance.

In, for example, DRAM, the degree of integration is prominentlyincreased. Therefore, in forming a contact hole, it is necessary to forma narrow stepped shape having a large aspect ratio. To meet thisrequirement, a silicon nitride film (SiN film) having a high selectivityratio has come to be used in, for example, DRAM as an etching stopperfilm in forming a contact hole in an interlayer insulating film (e.g.,TEOS oxide film) by RIE.

It is necessary for the SiN film used as an etching stopper film (RIEstopper film) of this kind to exhibit a selectivity ratio for RIE thatis sufficiently high relative to an oxide film such as a BPSG film or aTEOS film. Further, in accordance with progress in the degree ofintegration and miniaturization of the device element, it is necessaryto cover homogeneously and uniformly a narrow stepped shape having aseverer aspect ratio.

To meet these requirements, it was customary in forming a contact holeto use as a RIE stopper film a relatively dense SiN film formed by theLPCVD method at about 780° C. by using dichlorosilane (DCS) and ammoniaas raw materials. Where a TEOS film is etched by RIE, the RIEselectivity of the TEOS film relative to the SiN film thus formed is ashigh as about 7, and the SiN film was found to exhibit a permittivity ofabout 7.5. However, the permittivity of 7.5 is relatively large.Particularly, the capacitance between adjacent wirings or the RC delaytime of the entire device element are greatly dependent in recent yearson the capacitance of the RIE stopper film in accordance withminiaturization of the device element. As a matter of fact, thecapacitance of the RIE stopper film appears as a delay in the operatingspeed of the device element in a DRAM of the 0.18 micron era et seq.

Also, use of the SiN film as a RIE stopper film leads to an increasedbit line capacitance. In order to make up for the increased bit linecapacitance, it is necessary to prepare a capacitor having a largecapacitance, leading to disadvantages in the characteristics of thedevice.

Further, in the case of using a SiN film as a RIE stopper film, theconditions for RIE must be changed to those adapted for etching the SiNfilm after formation of an opening by etching in an oxide film such as aBPSG film or a TEOS film. It should be noted in this connection that theopening has a large aspect ratio and a small diameter, giving rise tovarious problems. For example, the SiN film at the bottom of the openingcannot be removed by RIE uniformly over the entire planar region, withthe result that the residue of the SiN film tends to remain on thebottom portion. Also, since the silicon substrate is directly exposed toRIE, damages done to the substrate are worried about. In this case, anover-etching cannot be performed sufficiently and, thus, the SiN filmpartly remains unremoved, giving rise to a possibility that anunsatisfactory electrical contact will be brought about.

In the next step, a treatment with a dilute hydrofluoric acid is carriedout for removing the native oxide film in the contact portion. Whatshould be noted is that the etching rate of the DCS-SiN film formed at780° C. by using dichlorosilane (DCS) as a raw material is 0.2 nm/minwhen etched with a dilute hydrofluoric acid ( 1/200) in contrast toabout 1 nm/min for the native oxide film. Since the etching rate of theDCS-SiN film is low, the native oxide film fails to be removed in theetching step with the dilute hydrofluoric acid.

On the other hand, a high processing speed is required for a logicdevice, making it necessary to decrease the so-called “RC delay time”,i.e., to decrease the capacitance between adjacent wirings and thewiring resistance. For decreasing the wiring resistance, use of copperfor forming the metal wiring is being studied. For using a copperwiring, a barrier layer is required for preventing oxidation of thecopper wiring and for preventing diffusion of copper within the copperwiring. Use of a SiN layer is now under study as one of the barrierlayers.

FIG. 36 exemplifies a structure in which a SiN film is formed as abarrier layer on a Cu wiring. The structure shown in the drawingincludes a TEOS oxide film 701, a TaN film 702, a Cu wiring 703 and aSiN film 704. Even in the case of employing the Cu wiring technology, anAl wiring is partly used in the narrow pitch portion between adjacentwirings in order to decrease the RC component between adjacent wirings.Therefore, it is necessary for the SiN film 704 to be formed in thesubsequent step at a temperature not exceeding the Al reflowingtemperature of 450° C. Also, the interlayer insulating film that isalready formed in the step of forming the wiring is formed of a lowpermittivity film (generally called low-k film) such as a film of FSG(Fluorine-added Silicate Glass) in order to decrease the permittivity.Since these films are formed at a low temperature, i.e., not higher than400° C., cracks tend to be generated at temperatures not lower than 450°C. Such being the situation, the SiN film 705 must be formed at lowtemperatures not higher than 450° C. In general, the SiN film 705 isformed by a plasma CVD which can be easily performed at lowtemperatures.

In a semiconductor device, the aspect ratio of the device elementseparating trench and the concave portion between gate electrodes tendsto be increased in accordance with miniaturization of the deviceelement. With increase in the aspect ratio, it gradually becomesdifficult to bury an insulating film such as a silicon oxide film withinthe trench without forming a so-called “void”.

Under the circumstances, use of an HDP (High-Density Plasma)-CVD methodor a TEOS-O₃ series CVD method is being tried. However, the formermethod gives rise to problems such as a plasma damage done to theunderlying layer, a nonuniformity in the film quality and a lowthroughput. Also, the latter method gives rise to the problem that aheat treatment at a high temperature is required for improving the filmquality after the film formation.

BRIEF SUMMARY OF THE INVENTION

As described above, an LPCVD method using dichlorosilane as a Si rawmaterial is proposed as a method for forming a silicon nitride film thatis buried in a wiring trench.

However, a ratio in the polishing rate by CMP of the interlayerinsulating film (SiO₂) to the silicon nitride film (DCS-SiN film) formedby this method is about 30. As a result, the DCS-SiN film is excessivelyetched in the step of removing by CMP the excess DCS-SiN film outsidethe wiring trench so as to increase the leakage current between theburied wiring and the lower capacitor electrode.

An object of the present invention, which has been achieved in view ofthe situation described above, is to provide a semiconductor deviceincluding a silicon nitride film having a step coverage substantiallyequal to that of the conventional silicon nitride film and exhibiting asufficiently large selectivity ratio relative to a silicon oxide film,and a method of manufacturing the particular semiconductor device.

According to a first aspect of the present invention, there is provideda semiconductor device including a silicon nitride film having achlorine concentration of at least 4×10²⁰ cm⁻³.

According to a second aspect of the present invention, there is provideda method of manufacturing a semiconductor device, comprising the step offorming a silicon nitride film having a chlorine concentration of atleast 4×10²⁰ cm⁻³ by an LPCVD method using a compound having a Si—Sibond and a Si—Cl bond as a Si raw material.

Further, according to a third aspect of the present invention, there isprovided a method of manufacturing a semiconductor device, comprisingthe steps of forming on a semiconductor substrate having a diffusionlayer formed in a surface region thereof an insulating film having awiring trench and a contact hole positioned below said wiring trench andconnected to said diffusion layer; forming a barrier metal layer on thesurface of said diffusion layer; forming a buried wiring filling thecontact hole and also filling a lower portion of the wiring trench, saidburied wiring being electrically connected to the diffusion layer;forming a silicon nitride film on the entire surface including thewiring trench in a manner to fill the upper portion of the wiringtrench; and removing the silicon nitride film positioned outside thewiring trench.

The specific construction of the present invention is as follows:

(1) The silicon nitride film contains an excessive amount of silicon.

(2) The nitrogen/silicon ratio of the silicon nitride film is smallerthan 1.33, which is smaller than the stoichiometric ratio of Si₃N₄.

(3) The silicon nitride film is formed inside the wiring trench having ahigh aspect ratio. Specifically, the aspect ratio of the wiring trenchis not smaller than 1.

(4) The silicon nitride film having a chlorine concentration of at least4×10²⁰ cm⁻³ is formed by an LPCVD method using a compound having a Si—Sibond and a Si—Cl bond as a Si raw material. Specifically, the Si rawmaterial is represented by Si_(n)Cl_(2n+2), where n is 2 or more, orSi_(n)Cl²⁻²H_(x), where n is 2 or more, and x is 2n+2 or less.Particularly, it is desirable to use Si₂Cl₆ as the Si raw material.Also, NH₃ is used as the nitrogen source.

(5) The chlorine concentration of the silicon nitride film can be set at4×10²⁰ cm⁻³ or more by forming the silicon nitride film at a temperaturenot higher than 700° C.

(6) A laminate structure consisting of a Ti film and a TiN film is usedas a barrier metal film, and the film-forming temperature of the siliconnitride film is set at 700° C. or less. Also, the wiring trench has ahigh aspect ratio, i.e., not smaller than 1.

It has been found as a result of the research conducted by the presentinventors that, if a compound having a Si—Si bond and a Si—Cl bond suchas Si₂Cl₆ is used as the Si raw material in the LPCVD method for forminga silicon nitride film, it is possible to form a silicon nitride filmexhibiting a selectivity ratio relative to a silicon oxide film inrespect of the polishing and etching. Also, the step coverage remainsunchanged because the LPCVD method satisfactory in step coverage isemployed in the method of the present invention.

It has also been found that, in the case of using the Si raw materialnoted above, the silicon nitride film can be formed at a sufficientlyhigh film-forming rate even if the film is formed at a low temperaturenot higher than 700° C., making it possible to use a laminate structureof Ti/TiN film as the barrier metal film. Also, the chlorineconcentration of the silicon nitride film formed by using the Si rawmaterial noted above at the film-forming temperature noted above hasbeen found to be not lower than 4×10²⁰ cm⁻³.

It should also be noted that, if the silicon nitride film is formed at atemperature not higher than 600° C., it is possible to obtain a siliconnitride film containing an excess silicon. The silicon nitride film ofthis kind is low in density and, thus, can be polished at a rate higherthan that of the silicon oxide film.

As described above, the DCS-SiN film used as a RIE stopper issatisfactory in the step coverage and the etching selectivity. However,the etching rate of the DCS-SiN film is not high enough to be removedcompletely when etched with a dilute hydrofluoric acid in the step ofremoving the native oxide film. Also, in view of decrease of thecapacitance between adjacent wirings, the DSC-SiN film gives rise to aproblem that the permittivity of the DSC-SiN film is relatively large.

Incidentally, a plasma SiN film formed as a barrier film of the Cuwiring by a plasma CVD using silane (SiH₄) and ammonia (NH₃) as rawmaterials has a relatively large permittivity of about 7. Also, a plasmaSiN film formed at 370° C. was subjected to a high temperature bias testunder 100° C. and 1 MV/cm by using a Cu electrode. It has been foundthat the thickness of the SiN diffusion-oxidation barrier film relativeto Cu, which is required for maintaining a sufficiently high insulationbreakdown voltage, is about 100 nm. However, if a SiN film having such alarge permittivity is formed in a thickness of 100 nm in the wiringportion, the capacitance between adjacent wirings is markedly increasedso as to impair the device characteristics.

Another object of the present invention, which has been achieved in viewof the situation described above, is to provide a semiconductor deviceincluding a silicon nitride film substantially equal to the prior art inthe step coverage and the etching selectivity, low in permittivity, highin etching rate when etched with a dilute hydrofluoric acid, and used asan etching stopper film in etching a silicon oxide film, and a method ofmanufacturing the particular semiconductor device.

Another object of the present invention, which has been achieved in viewof the situation described above, is to provide a semiconductor deviceincluding a silicon nitride film low in permittivity and used as abarrier film for Cu, and a method of manufacturing the particularsemiconductor device.

To achieve these objects, the semiconductor device of the presentinvention is featured in that a silicon nitride film having a chlorineconcentration of at least 1×10²¹ cm⁻³ is used as an etching stopper filmor a barrier film.

Concerning the LPCVD method for forming a silicon nitride film, it hasbeen found that, if a compound having a Si—Si bond and a Si—Cl bond suchas Si₂Cl₆ is used as the Si raw material, it is possible to form asilicon nitride film exhibiting a sufficiently large etching selectivityrelative to a silicon oxide film.

The chlorine concentration of the silicon nitride film formed by usingthe particular Si raw material has been found to be at least 1×10²¹cm⁻³. Also, the step coverage has been found to be substantially equalto the prior art because an LPCVD method that permits achieving a goodstep coverage is employed in the method of the present invention.Further, in the case of using the particular Si raw material, it ispossible to diminish the permittivity of the silicon nitride film, toincrease the etching rate of the silicon nitride film when etched with adilute hydrofluoric acid, and to improve the barrier properties of thesilicon nitride film relative to Cu. These features of the presentinvention will be described hereinlater in detail in conjunction withthe embodiments of the present invention.

As described above, it has become difficult to form a silicon nitridefilm excellent in burying properties in a concave portion having a highaspect ratio and in film characteristics in accordance withminiaturization of the device element.

Another object of the present invention is to provide a semiconductordevice that permits forming a silicon nitride film excellent in buryingproperties and film characteristics in a concave portion having a highaspect ratio and a method of manufacturing the particular semiconductordevice.

According to a fourth aspect of the present invention, which has beenachieve in view of the situation described above, there is provided amethod of manufacturing a semiconductor device, comprising the steps offorming a silicon nitride film over an entire region of a concaveportion formed in an underlying layer region on the side of a mainsurface of a semiconductor substrate; and oxidizing said silicon nitridefilm to convert the silicon nitride film into a silicon oxide film so asto form an insulating region over the entire region within the concaveportion.

According to a fifth aspect of the present invention, there is provideda method of manufacturing a semiconductor device, wherein an insulatingregion is formed over an entire region of a concave portion formed in anunderlying region on the side of a main surface of a semiconductorsubstrate by repeating a plurality of times in a film-forming directionthe steps of forming a silicon nitride film within said concave portionand oxidizing said silicon nitride film to convert the silicon nitridefilm into a silicon oxide film.

Preferred embodiments of the manufacturing method of the presentinvention are as follows:

(1) The silicon nitride film contains at least one of phosphorus andboron, and a silicon oxide film containing at least one of phosphorusand boron is formed by oxidizing the silicon nitride film.

(2) The silicon oxide film contains chlorine in an amount of at least1×10¹⁹ cm⁻³.

(3) The silicon nitride film contains chlorine in an amount of at least9×10²⁰ cm⁻³. It is desirable for the silicon nitride film to have adensity not higher than 2.4 g/cm³ and a specific inductive capacity notlarger than 7.3.

(4) The silicon nitride film is formed by an LPCVD method using acompound having a Si—Si bond and a Si—Cl bond as a raw material gas.

(5) The compound used in the LPCVD method is represented bySi_(n)Cl_(2n+2) or Si_(n)Cl_(2n+−x)H_(x), where n is an integer of 2 ormore, and x is an integer smaller than 2n+2. A typical example of theparticular compound is hexachlorodisilane.

(6) The silicon nitride film is formed at a temperature lower than 450°C.

The semiconductor device of the present invention is featured in thatthe device comprises an underlying region having a concave portionformed on the side of a main surface of the semiconductor substrate anda silicon oxide film containing chlorine, which is buried over theentire region of the concave portion of the underlying region.

In the present invention, a silicon nitride film, particularly, asilicon nitride film containing chlorine is oxidized for conversion intoa silicon oxide film, with the result that a silicon oxide film isburied uniformly and homogeneously within the concave portion. It shouldalso be noted that, even if the silicon nitride film includes a void, asilicon oxide film free from the void can be obtained because a volumeexpansion accompanies the conversion from the silicon nitride film intothe silicon oxide film.

Further, since chlorine is contained in the silicon oxide film, thedangling bond present in the interface with another film can beterminated so as to decrease the leakage current.

Still further, the silicon oxide film containing chlorine is alsoallowed to contain at least one of phosphorus and boron so as to obtainadditional effects that the gettering of impurities and selectivityratio in the etching step are improved.

Additional objects and advantages of the invention will be set forth inthe description which follows, and in part will be obvious from thedescription, or may be learned by practice of the invention. The objectsand advantages of the invention may be realized and obtained by means ofthe instrumentalities and combinations particularly pointed outhereinafter.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWING

The accompanying drawings, which are incorporated in and constitute apart of the specification, illustrate presently preferred embodiments ofthe invention, and together with the general description given above andthe detailed description of the preferred embodiments given below, serveto explain the principles of the invention.

FIGS. 1A to 1F are cross sectional views collectively showing a methodof manufacturing a semiconductor device according to each of first andsecond embodiments of the present invention;

FIG. 2 is a graph showing the relationship between the chlorineconcentration in a silicon nitride film (HCD-SiN film) of the presentinvention and the film-forming temperature;

FIG. 3 is a graph showing the relationship between the permittivity ofthe HCD-SiN film and the film-forming temperature;

FIG. 4 is a graph showing the relationship between the chlorineconcentration in a silicon nitride film and a polishing rate;

FIG. 5A is a graph showing the relationship between the RIE rate of theHCD-SiN film and the film-forming temperature;

FIG. 5B is a graph showing the RIE rate in the case of forming theDCS-SiN film at 700° C.;

FIG. 6 is a graph showing the relationship among the RIE selectivityratio of a TEOS film to an HCD-SiN film, the film-forming temperatureand the ammonia flow rate;

FIG. 7 is a graph showing the relationship between the forming rate ofthe HCD-SiN film and the film-forming temperature;

FIG. 8 shows the Silicon 2p states of silicon in an HCD-SiN filmmeasured by photoelectron spectroscopy;

FIG. 9 shows the results of chemical analysis of N/Si ratio in siliconnitride films formed by changing the film-forming temperature in thesecond embodiment of the present invention;

FIG. 10 shows the density of the HCD-SiN film formed by changing thefilm-forming temperature in the second embodiment of the presentinvention and the density of the DCS-SiN film formed at 700° C.;

FIGS. 11A to 11I are cross sectional views collectively showing a formerpart of a method of manufacturing a MOS transistor according to a thirdembodiment of the present invention;

FIG. 12 is a cross sectional view corresponding to the cross sectionalview shown in FIG. 11G, covering the case where a dummy gate and a gateside wall insulating film are formed by using the conventional techniquealone;

FIG. 13 is a graph showing the relationship between the etching rate, inthe etching with a dilute hydrofluoric acid, of a silicon nitride filmformed by using hexachlorodisilane and the film-forming temperature;

FIG. 14 is a graph showing the relationship between the flow rate ofnitrogen gas that is allowed to flow during formation of a siliconnitride film using Si₂Cl₆ as a Si raw material and the wet etching rateof the silicon nitride film;

FIGS. 15A to 15D are cross sectional views collectively showing a methodof manufacturing a semiconductor device according to a fourth embodimentof the present invention;

FIG. 16 shows SIMS profiles of Cl and H before and after heat treatmentof an HCD-SiN film;

FIGS. 17A and 17B are cross sectional views collectively showing amethod of manufacturing a semiconductor device according to a fifthembodiment of the present invention;

FIG. 18 shows the changes with time in the leakage current throughvarious SiN films;

FIG. 19 is a graph showing the relationship between the time requiredfor breakage of a SiN film and the Cl concentration in the SiN film;

FIGS. 20A and 20B are cross sectional views collectively showing amethod of manufacturing a semiconductor device according to a sixthembodiment of the present invention;

FIG. 21 show SIMS profiles of various device elements contained in thesilicon nitride film of the present invention;

FIG. 22 show SIMS profiles of various device elements contained in thesilicon oxide film of the present invention;

FIGS. 23A to 23C are cross sectional views collectively showing a methodof manufacturing a semiconductor device according to a seventhembodiment of the present invention;

FIGS. 24A to 24F are cross sectional views collectively showing a methodof manufacturing a semiconductor device according to an eighthembodiment of the present invention;

FIGS. 25A to 25D are cross sectional views collectively showing a methodof manufacturing a semiconductor device according to a ninth embodimentof the present invention;

FIG. 26 is a graph showing the relationship between the permittivity ofa silicon nitride film in which carbon is not introduced and thefilm-forming temperature;

FIG. 27 is a graph showing the relationship between the RIE rate of asilicon nitride film in which carbon is not introduced and thefilm-forming temperature;

FIG. 28 is a graph showing the relationship between the RIE rate and thecarbon concentration in a silicon nitride film;

FIG. 29 shows how the entire silicon nitride film is rounded in the RIEstep;

FIG. 30A is a cross sectional view showing a DRAM using a siliconnitride film of the present invention;

FIG. 30B is a cross sectional view showing a DRAM using a conventionalsilicon nitride film;

FIG. 31 is a graph showing the carbon concentration in a silicon nitridefilm and the etching rate of the silicon nitride film when etched with adilute hydrofluoric acid;

FIGS. 32A and 32B are cross sectional views showing a modification ofthe ninth embodiment of the present invention;

FIG. 33 is a cross sectional view showing a cross section of aconventional DRAM in a direction perpendicular to the longitudinaldirection of the channel of a MOS transistor;

FIG. 34 is a cross sectional view showing a problem in the case where asilicon nitride film is formed by an LPCVD method using dichlorosilaneetc.;

FIG. 35 is a cross sectional view showing another problem in the casewhere a silicon nitride film is formed by an LPCVD method usingdichlorosilane etc.;

FIG. 36 is a cross sectional view showing a region in the vicinity of aconventional Cu wiring; and

FIG. 37 is for explaining the reason why an LPCVD method is employed forforming a silicon nitride film.

DETAILED DESCRIPTION OF THE INVENTION

Some embodiments of the present invention will now be described withreference to the accompanying drawings.

First Embodiment

FIGS. 1A to 1F are cross sectional views collectively showing a methodof manufacturing a semiconductor device according to a first embodimentof the present invention. These drawings show cross sections in adirection perpendicular to the longitudinal direction of the channel ofa MOS transistor of a DRAM cell.

In the first step, an n-type drain diffusion layer 102, etc. are formedby a known method in a silicon substrate 101 to finish forming a MOStransistor, followed by forming an interlayer insulating film (SiO₂film) 103 on the entire surface, as shown in FIG. 1A. Then, a contacthole 104 exposing the n-type drain diffusion layer 102 and a wiringtrench 105 connected to the n-type drain diffusion layer 102 via thecontact hole 104 are formed in the interlayer insulating film 103,followed by forming a silicon nitride film 106 over the entire surface,as shown in FIG. 1B. The silicon nitride film 106 thus formed isselectively removed by RIE (reactive ion etching) such that the siliconnitride film 106 is left unremoved on the side walls defining thecontact hole 104 and the wiring layer 105, followed by forming a Tilayer 107 by ion implantation in the substrate surface on the bottom ofthe contact hole 104 and subsequently forming a TiN film 108 on theentire surface by a CVD method, as shown in FIG. 1C.

In the next step, the contact hole 104 and a lower portion of the wiringtrench 105 are filled with a tungsten (W) layer by selective growth of Wto form a buried wiring 109, as shown in FIG. 1D. The upper portion ofthe wiring trench 105 in which the buried wiring 109 of W is not formedhas a depth of 150 nm and a width of 150 nm. In other words, the upperportion of the wiring trench 105 has an aspect ratio of 1.

The construction shown in FIG. 1D can also be obtained by forming a Wfilm on the entire surface, followed by removing by CMP an excess W filmoutside the contact hole 104 and the wiring trench 105 and subsequentlyforming an additional interlayer insulating film (SiO₂) on the entiresurface and forming an additional wiring trench in the additionalinterlayer insulating film in a manner to be positioned above the wiringtrench 105.

The Ti layer 107 formed at the bottom of the contact hole 104 and theTiN film 108 act as barrier metal layers for preventing the reactionbetween the drain diffusion layer 102 and the buried W wiring 109 in thesubsequent heat treating step.

It should be noted that the Ti layer 107 and the TiN film 108 are low inresistance to heat. If a heat treatment is applied at temperatures notlower than 700° C. for a long time, these Ti layer 107 and TiN film 108fail to maintain their functions. It follows that it is necessary toform the silicon nitride film 106 at temperatures not higher than 700°C.

The silicon nitride film 106 is formed by an LPCVD method. It should benoted in this connection that the silicon nitride film formed by theplasma CVD method is low in its step coverage, with the result that, ifthe aspect ratio of the wiring trench 105 is higher than 1.0, aclearance is formed in a central portion of the wiring trench 105, asshown in FIG. 37. It follows that the silicon nitride film formed by theplasma CVD method fails to ensure satisfactory insulating properties.The other reason for employment of the LPCVD method is that the siliconnitride film formed by the plasma CVD method is not resistant to etchingunder RIE conditions of silicon, resulting in failure for the siliconnitride film to perform the function of a mask.

Incidentally, where a mixed gas consisting of silane and ammonia is usedas the raw material gas, the resultant silicon nitride film is low inits step coverage even if the film is formed by the LPCVD method. Inaddition, the silicon nitride film is low in uniformity over the entireregion of the wafer. On the other hand, in the case of using a Si rawmaterial having chlorine substituted for hydrogen such as dichlorosilaneor tetrachlorosilane, a silicon nitride film having a high step coveragecan be obtained. As a matter of fact, it is possible to achieve 100% ofthe step coverage, even if the wiring trench has an aspect ratio ofabout 20. However, the difficulties already described in conjunctionwith the prior art remain unsolved in the LPCVD method using the rawmaterial gas of this kind.

In the next step, the TiN film 108 positioned above the buried wiring109 of W is removed by a wet etching, followed by forming by an LPCVDmethod using a mixed gas consisting of Si₂Cl₆ (hexachlorodisilane: HCD)and NH₃ a silicon nitride film (HCD-SiN film) 110 acting as a capinsulating film on the entire surface in a manner to fill the innerspace of the wiring trench 105, as shown in FIG. 1E. The silicon nitridefilm 110 is formed under the temperature of 650° C., the reactor innerpressure of 0.5 Torr and the NH₃/Si₂Cl₆ flow rate ratio of 2000/20.Under these conditions, the silicon nitride film 110 is formed at a rateof 2.7 nm/min.

Finally, the excess HCD-SiN film 110 is removed by CMP to make thesurface flat, as shown in FIG. 1F, followed by forming by a known methoda lower capacitor electrode (not shown), a capacitor insulating film(not shown) and an upper capacitor electrode (not shown) so as to finishpreparation of a DRAM memory cell.

It is desirable to use an insulating film consisting of a metal oxidehaving a high permittivity such as Ba_(x)Sr_(1-x)TiO₃ as the capacitorinsulating film. On the other hand, it is desirable to use a conductivefilm consisting of a metal oxide, which exhibits a conductivity even ifoxidized, such as SrRuO₃ for forming each of the lower and uppercapacitor electrodes. It is also desirable for the capacitor insulatingfilm and upper and lower capacitor electrodes to have the same crystalstructure, e.g., perovskite structure.

The slurry used in the CMP step should consist of small silicaparticles, 2.5% by weight of phosphoric acid and water. Also, the loadof the polishing pad should be 200 gf.

The thickness of the wafer after the CMP treatment was measured at 9points within the wafer surface to obtain the average thickness of thewafer, thereby determining the polishing rate of the silicon nitridefilm. The polishing rate of the HCD-SiN film 110 was found to be about90 nm/min in contrast to only about 60 nm/min for the conventionalsilicon nitride film of DCS-SiN film. In other words, the firstembodiment of the present invention permits increasing the selectivityratio (polishing rate of silicon nitride film/polishing rate of siliconoxide film) from the conventional value 30 to 45.

Since the polishing ratio is large, the polishing of the HCD-SiN film110 by CMP is substantially stopped at the interlayer insulating film103. Although the interlayer insulating film 103 may be somewhatremoved, an overpolishing does not take place to expose the buried Wwiring 109 to the outside. It follows that it is possible to realize theburied shape and flatness as designed.

Also, in the first embodiment of the present invention, it is possibleto obtain a high step coverage equivalent to that of the conventionalDCS-SiN film. The reasons for the high step coverage in the firstembodiment are considered to reside in that an LPCVD method is employedas a film-forming method, making it possible to fill uniformly the innerspace of the wiring trench 106, and that the adsorption probability ofthe reaction intermediate of the chloride such as Si₂Cl₆ (chloride ofdisilane) used as the Si raw material in the first embodiment is lowerthan that of the complete hydride.

FIG. 2 is a graph showing changes with temperature in the chlorineconcentration of the silicon nitride film (HCD-SiN film) formed by anLPCVD method using Si₂Cl₆ as the Si raw material. Incidentally, thechlorine concentration was found to be 8×10¹⁹ in the silicon nitridefilm (DCS-SiN film) formed by an LPCVD method at 700° C. usingdichlorosilane as the Si raw material, though this case is not shown inthe graph of FIG. 2. The chlorine concentration was determined by asecondary ion mass spectroscopy (SIMS).

The film-forming temperature was set at 650° C. in the first embodiment.However, since FIG. 2 indicates that the chlorine concentration islinearly decreased in a region where 1000/T is about 1.1 or less in thecase of using Si₂Cl₆ as the Si raw material, it is considered reasonableto understand that, if the firm-forming temperature is set at 800° C. orless, it is possible to form the silicon nitride film 110 having achlorine concentration higher than that in the case of using theconventional Si raw material of dichlorosilane. It should be noted,however, that, in the case of forming the silicon nitride film 10 in theburied wiring portion as in the first embodiment of the presentinvention, it is desirable to perform the film formation at 700° C. orless because the Ti film 7 and the TiN film 8 are incapable of resistingthe heat of temperatures higher than 700° C.

The chlorine concentration of the HCD-SiN film higher than that of theDCS-SiN film is considered to be brought about by mainly two factorsgiven below. First of all, the film-forming rate of the HCD-SiN film ishigher than that of the DCS-SiN film. Naturally, the HCD-SiN film can beformed in a shorter time than the DCS-SiN film under the samefilm-forming conditions including the temperature, with the result thatthe amount of chlorine lost from the film during the film formation issuppressed. The difference in the film-forming rate between the HCD-SiNfilm and the DCS-SiN film is considered to be brought about because thedissociation of the Si—Si bond is advantageous for the film formation.

When it comes to the bond energy, the Si—Cl bond has a bond energy of4.16 eV, which is the highest bond energy among the bonds conceivable inthe case of using the HCD+NH₃ system. If the same number of chlorineatoms are supposed to be attached to the surfaces of the DCS-SiN filmand the HCD-SiN film in the film forming step, the Si—Cl bonds that areunlikely to be cut away are included in a larger amount in the HCD-SiNfilm having a higher film-forming rate.

The second reason for the high chlorine concentration in the HCD-SiNfilm is that the HCD-SiN film can be formed at a lower temperature. Asshown in FIG. 2, the chlorine concentration is increased with decreasein the film-forming temperature. Also, where the film-formingtemperature is lower than 450° C., the chlorine concentration is highunder the condition of a higher film-forming rate, i.e.,NH₃/HCD=1000/50.

FIG. 3 is a graph showing the changes with the film-forming temperaturein the permittivity of the HCD-SiN film determined by the C-Vmeasurement. The white square marks □ in the graph represent thatammonia and HCD were used as the raw materials. The black square marks ▪in the graph represent the case where a nitrogen gas (N₂) was added tothe raw materials of ammonia and HCD during the film-formation.

As apparent from the graph of FIG. 3, the permittivity of the HCD-SiNfilm was lower than the permittivity (=7.8) of the ordinary siliconnitride film (Si₃N₄) under the film-forming temperature not higher than700° C. For example, the permittivity of the HCD-SiN film formed at 450°C., which is denoted by the black square ▪, is smaller by 20 to 30% thanthat of P-CVD-SiN film denoted by dotted lines in the graph. Also, thepermittivity of the HCD-SiN film formed at 450° C., which is denoted bythe black square ▪, is small, i.e., 5.4, compared with that (7.3) of theHCD-SiN films formed at 550° C. to 700° C. under the ammonia flow rate Rof 100 sccm and a pressure of 0.5 Torr, which are denoted by whitecircles ◯. Further, the white squares □ represent HCD-SiN films formedunder the ammonia flow rate 100 and a pressure of 1.4 Torr. Also, thepermittivity of the HCD-SiN film under the film-forming temperature nothigher than 450° C. was very low, i.e., not larger than 6, which issmaller than the permittivity (=about 7) of a plasma-silicon nitridefilm (p-SiN). Since the permittivity is small, the wiring capacitancecan be markedly decreased, which is highly advantageous in the casewhere the HCD-SiN film is used as an insulating film in a so-called“multilayered wiring” portion. Also, in this experiment, the samplesused in the film formation under 600° C. or more were different from thesamples used in the film formation under 450° C. or less. However,similar results were obtained in the case of using the same samples.Incidentally, a nitrogen gas was not allowed to flow during formation ofthe HCD-SiN films shown in FIG. 3. However, an appreciable difference inthe permittivity of the HCD-SiN film is not recognized even if the filmis formed under the nitrogen gas stream.

FIG. 4 is a graph showing the relationship between the chlorineconcentration in the silicon nitride film and the polishing rate. Asapparent from the graph, the polishing rate is increased in proportionto the chlorine concentration. The reason for the particular phenomenonis considered to reside in that a large number of chlorine ions having alarge radius of ion are contained in the network consisting of Si—N soas to disturb the network. In other words, a high chlorine concentrationpermits forming a silicon nitride film of a low density, leading to ahigh polishing rate by CMP.

The above description covers the case where the silicon nitride film isremoved by CMP. Where RIE is employed for removing the silicon nitridefilm, the etching rate of the silicon nitride film was found to be asshown in FIGS. 5A and 5B. Specifically, the HCD-SiN film was found to belower in the etching rate than the DCS-SiN film formed at 700° C.regardless of the film-forming temperature, as shown in the drawings. Itfollows that the HCD-SiN film 110 in the first embodiment is adapted foruse as a mask in the step of forming by RIE the contact hole forconnecting the lower capacitor electrode to the n⁺-type source diffusionlayer 102 in the interlayer insulating film 103, compared with theconventional DCS-SiN film. Incidentally, FIG. 5A shows the results underthe etching conditions for forming the opening of the contact hole, withFIG. 5B showing the results under the etching conditions for the taperedprocessing.

FIG. 6 is a graph showing the relationship among the RIE selectivityratio of the TEOS oxide film to the HCD-SiN film, i.e., etching rate ofTEOS oxide film/etching rate of HCD-SiN film, the film-formingtemperature and the ammonia flow rate R. The RIE selectivity ratio ofthe TEOS oxide film to the DCS-SiN film formed at 700° C. is also shownin the graph of FIG. 6. Line indicated in the figure shows the RIE rateof DCS-SiN formed at 700° C., the black circles ● the graph representHCD-SiN films formed under a pressure of 0.5 Torr, an ammonia/HCD flowrate ratio R of 100, and temperatures of 600° C., 650° C. and 700° C. Asshown in the graph, the etching selectivity ratio was found to be about7 in each of these cases. On the other hand, the blacks square ▪ andblack triangle ▴ in the graph represent HCD-SiN films formed under apressure of 1.4 Torr and ammonia/HCD flow rate ratios R of 50 and 20,respectively. In each of these cases, the selectivity ratio was found tobe about 6, though these films were formed at a low temperature of 450°C. As apparent from the graph, RIE permits obtaining a selectivity ratiosubstantially equal to that of DCS-SiN film regardless of the ammoniaflow rate R and the film-forming temperature.

FIG. 7 is a graph showing the relationship between the film-forming rateof the HCD-SiN film and the film-forming temperature. As apparent fromthe graph, a sufficiently high film-forming rate can be obtained even ata film-forming temperature of 250° C. in the case of the HCD-SiN film.It follows that, if the silicon nitride film 10 is formed at 650° C. asin the first embodiment of the present invention, it is possible toensure a sufficiently high film-forming rate of the silicon nitride film10 without loosing the function of the TiN film 8 as a barrier metalfilm.

Also, in the first embodiment of the present invention, a siliconnitride film is formed to fill the inner space of the wiring trench 5having a buried wiring formed in the lower portion. It is also effectiveto form a silicon nitride film in a manner to fill a trench formed in asemiconductor device of the next era, e.g., a trench having a film ofvarious laminate structures formed in a lower portion. To be morespecific, it is possible to form a silicon nitride film in a manner tofill a trench formed in a silicon oxide film and having a laminated filmof oxynitride film/polysilicon film/tungsten film (polymetal gate)formed in a lower portion.

Further, in the first embodiment, Si₂Cl₆ is used as the Si raw material.In the case of forming a silicon nitride film having a high chlorineconcentration, the similar effect can be obtained by using a chloridehaving at least one Si—Si bond such as Si₃Cl₈ and Si₄Cl₁₀ and a Si rawmaterial such as Si_(n)Cl_(2n+2), where n is not smaller than 2.

Second Embodiment

The first embodiment is directed to formation of a silicon nitride filmhaving a high chlorine concentration. On the other hand, the secondembodiment is directed to formation of a silicon nitride film having ahigh chlorine concentration and containing an excess silicon. FIGS. 1Ato 1F will also be used for describing the second embodiment.

The second embodiment is equal to the first embodiment up to the stepshown in FIG. 1D. Then, a silicon nitride film (HCD-SiN film) 10 isformed on the entire surface in a manner to fill the inner space of thewiring trench 6 by an LPCVD method using a mixed gas consisting ofSi₂Cl₆ and NH₃, as shown in FIG. 1E. The silicon nitride film 10 isformed at a temperature of 600° C., a reactor inner pressure of 0.5Torr, and a NH₃/Si₂Cl₆ flow rate ratio of 2000 sccm/20 sccm. Thefilm-forming rate is 1.4 nm/min.

In the next step, the excess HCD-SiN film 10 outside the wiring trench 6is removed by CMP under the conditions equal to those in the firstembodiment so as to flatten the surface, as shown in FIG. 1F.

The film thickness after the CMP step indicated that the polishing rateof the HCD-SiN film 10 formed in the second embodiment was higher thanthat of the DCS-SiN film formed by the conventional method usingdichlorosilane as the Si raw material. Since the second embodimentpermits improving the polishing rate, it is possible to achieve a largeselectivity ratio of the HCD-SiN film 10 relative to the silicon oxidefilm, making it possible for the polishing of the silicon nitride filmby CMP to be stopped by the silicon oxide film. As a result, an excesspolishing of the silicon nitride film can be suppressed, a buried shapeas designed can be achieved, and processing of a high flatness can beperformed.

The bonding state of silicon atoms within the silicon nitride filmsformed by changing the film-forming temperatures in the method of thesecond embodiment of the present invention was examined by the surfaceanalysis by X-ray photoelectron spectroscopy (XPS). FIG. 8 shows theresults. As apparent from FIG. 8, a silicon nitride film having Si—Nbonds can be formed in the second embodiment of the present inventioneven if the film-forming temperature is changed.

FIG. 9 is a graph showing the result of chemical analysis in respect ofthe N/Si ratio in silicon nitride films formed at various temperaturesby the second embodiment of the present invention. As apparent from thegraph, it is possible to form a silicon nitride film (HCD-SiN film)having an excess silicon, i.e., N/Si≦1.33, compared with silicon nitride(Si₃N₄) film having a stoichiometric ratio, if the film-formingtemperature is not higher than 700° C. The graph also shows that theHCD-SiN film is rich in silicon, compared with the conventionalDCS-silicon nitride film.

The distance of Si—Si bond is 0.225 nm, which is longer than thedistance of Si—N bond of 0.157 nm. Therefore, if a silicon nitride filmhaving an excess silicon is formed, the network consisting of Si—N bondsis considered to be greatly disturbed. In other words, the siliconnitride film having an excess silicon has a lower density and, thus, thepolishing rate is increased when polished by CMP. Also, the chlorineconcentration in the film is increased, as shown in FIG. 2.

FIG. 10 is a graph showing the densities of the HCD-SiN films formed atvarious temperatures by the method of the second embodiment and thedensity of the conventional DSC-SiN film formed at 700° C.

The density was measured as follows. Specifically, the surface of thesilicon nitride film other than the region that was to be dissolved in aDHF solution was covered with an HF-resistant tape. Then, the siliconnitride film in the uncovered region, sized at 6 cm×6 cm, was dissolvedin the DHF solution, followed by weighing the silicon and nitrogenwithin the DHF solution so as to determine the density.

The black square in FIG. 10 at the film-forming temperature of 700° C.represents the conventional DCS-SiN film, with the other three pointsrepresenting the HCD-SiN films formed by the second embodiment of thepresent invention. The ammonia flow rate R was 10 for the DSC-SiN filmand 100 for each of the HCD-SiN films of the present invention.

As apparent from FIG. 10, the density of the HCD-SiN film is loweredwith decrease in the film-forming temperature. Unlike the DSC-SiN film,the HCD-SiN film does not exhibit a prominent decrease in thefilm-forming rate even if the film-forming temperature is lower than700° C., making it possible to form the HCD-SiN film in a practicalfilm-forming time. It follows that an HCD-SiN film having a densitylower than that of the DCS-SiN film can be obtained easily by loweringthe film-forming temperature.

Further, a silicon nitride film having an excess silicon can be formedunder a film-forming temperature of 700° C. and a reactor inner pressureof 0.5 Torr by lowering the NH₃/Si₂Cl₆ flow rate ratio to 10 or less. Itshould be noted, however, that the conductivity of the film is increasedif the film has an excess silicon. Therefore, if the flow rate ratio isexcessively lowered, the resultant silicon nitride film fails tomaintain insulating properties. It follows that it is necessary to setthe NH₃/Si₂Cl₆ flow rate ratio to meet the desired properties of theresultant silicon nitride film.

Further, in the second embodiment, Si₂Cl₆ is used as the Si rawmaterial. In the case of forming a silicon nitride film having a highchlorine concentration and an excess silicon, the similar effect can beobtained by using a chloride having at least one Si—Si bond such asSi₃Cl₈ and Si₄Cl₁₀ and a Si raw material such as Si_(n)Cl_(2n+2), wheren is not smaller than 2.

Third Embodiment

With progress in miniaturization of the device element, it is necessaryto decrease the resistance of the gate electrode. Therefore, it isnecessary in the next era to change the polymetal gate structureemployed nowadays into a metal gate electrode. On the other hand, sinceit is difficult to achieve fine processing of a metal film by etching, adamascene gate process (A. Yagishita, et al., IEDM Tech. Digest, 1998:p. 785) is employed for forming a metal gate electrode. Also, a dummygate is required for forming a trench in which the metal gate electrodeis buried. A method of manufacturing a MOS transistor by using a metalgate electrode according to a third embodiment of the present inventionwill now be described with reference to FIGS. 11A to 11I.

In the first step, a shallow trench is formed in a surface region of asilicon substrate 121, followed by forming a thermal oxide film 122 onthe entire surface and subsequently burying a device element separatinginsulating film 123 within the shallow trench so as to achieve a deviceelement isolation by STI (Shallow Trench Isolation), as shown in FIG.11A. The device element isolating insulating film 123 is an oxide filmformed by using TEOS as a raw material.

Then, a polycrystalline silicon (polysilicon) film 124 is formed on theentire surface in a thickness of 150 nm by an LPCVD method under theordinary conditions, as shown in FIG. 11B. After formation of thepolysilicon film 124, an HCD-SiN film 125 is formed in a thickness of150 nm on the polysilicon film 124 by an LPCVD method under atemperature of 550° C. and a pressure of 1.4 Torr. In forming theHCD-SiN film 125, Si₂Cl₆ and NH₃ are used as the raw material gases. Theflow rate ratio of NH₃/Si₂Cl₆ should be set at 1000/10.

In the third embodiment of the present invention, the HCD-SiN film 125is formed at a low temperature, i.e., 500° C. On the other hand, theconventional DCS-SiN film is formed at such a high temperature as 700 to780° C.

Under the film-forming conditions (flow rate ratio of raw materialgases, film-forming temperature, and film-forming pressure) describedabove, the film-forming rate is 1.5 nm/min and, thus, the film-formingtime is 100 minutes. It is possible to further increase the film-formingrate by increasing the partial pressure ratio of Si₂Cl₆, e.g., byincreasing the total pressure or by decreasing the NH₃ flow rate.

In the next step, a resist pattern 126 is formed by photolithography orEB depiction as shown in FIG. 11C, followed by removing by RIE theHCD-SiN film 125 and the polysilicon film 124 using the resist pattern126 as a mask, thereby forming a dummy gate 127 of a laminate structureconsisting of the HCD-SiN film 125 and the polysilicon film 124. Then,the resist pattern 126 is peeled off.

After formation of the dummy gate 127, an oxide film 128 is formed bythermal oxidation in a thickness of about 6 nm, as shown in FIG. 11D,followed by forming a shallow diffusion layer (LDD) 129 by introducing alow concentration of an impurity by ion implantation using the HCD-SiNfilm 125 as a mask. Where the diffusion layer 129 has an n-typeconductivity, the diffusion layer 129 is formed by implanting, forexample, As ions under an accelerating energy of 1 keV at a close of3×10¹⁴ cm⁻².

In the next step, a DCS-SiN film is formed in a thickness of 70 nm onthe entire surface by an LPCVD method using the conventional rawmaterial of dichlorosilane, followed by selectively removing the DCS-SiNfilm by RIE so as to form a gate side wall DCS-SiN film 130, as shown inFIG. 11E. The DCS-SiN film is formed at a temperature of, for example,700° C., a pressure of 0.5 Torr, and a NH₃/SiH₂Cl₂ flow rate ratio of500/50.

Then, source/drain diffusion layers 131 having a high impurityconcentration is formed by ion implantation using the gate side wallDCS-SiN film 130 and the HCD-SiN film 125 as a mask. Where thesource/drain diffusion layers have an n-type conductivity, impurityions, e.g., As ions, are implanted under an accelerating energy of 45keV and at a dose of 3×10¹⁵ cm⁻².

It is possible to perform the annealing treatment for activating theimpurities contained in the shallow diffusion layer 129 and thesource/drain diffusion layer 131 every time the impurity ions areimplanted. It is also possible to perform the annealing treatment aftercompletion of all of the ion implantation treatments.

Further, an interlayer insulating film 132 is formed on the entiresurface in a thickness of All about 350 nm by an LPCVD method using TEOSseries raw material, as shown in FIG. 11F, followed by polishing theinterlayer insulating film 132 by a CMP method to flatten the surface.In this step, the HCD-SiN film 125 acts as a CMP stopper.

In the next step, the HCD-SiN film 125 is selectively removed by using ahot phosphoric acid solution of 160° C., followed by removing thepolysilicon film 124 by a CDE method and subsequently removing theunderlying thermal oxide film 122 by using a dilute hydrofluoric acid,as shown in FIG. 11G.

In this embodiment, the dummy gate 127 is formed of the HCD-SiN film125, and the gate side wall DCS-SiN film 130 is used as the gate sidewall insulating film. Therefore, the wet etching selectivity ratio ofthe gate side wall DCS-SiN film 130 can be set at a large value relativeto the HCD-SiN film 125 by controlling the film-forming temperature, asdescribed herein later.

It is important for the gate side wall insulating film to exhibit alarge wet etching selectivity ratio relative to the silicon nitride filmconstituting the dummy gate 127. It should be noted in this connectionthat, if the dummy gate 127 and the gate side wall insulating film areetched simultaneously, the silicon substrate 121 is damaged in the stepof removing the polysilicon film 124 by the CDE method. In the worstcase, the silicon substrate 121 is polished.

FIG. 12 is a cross sectional view corresponding to the cross sectionalview shown in FIG. 11G, covering the case where the dummy gate 127 andthe gate side wall insulating film are formed by using the conventionaltechnology alone. As shown in FIG. 12, a problem that the siliconsubstrate 121 is polished is brought about in the case of employing theconventional technology alone. In order to prevent the problem, it isnecessary to provide a sufficiently large difference in etching ratebetween the dummy gate and the gate side wall insulating film relativeto a chemical solution used for the processing as in the thirdembodiment of the present invention.

FIG. 13 is a graph showing the relationship between the etching rate ofthe silicon nitride film (HCD-SiN film) formed by usinghexachlorodisilane and the film-forming temperature when the siliconnitride film is etched with a dilute hydrofluoric acid (water:HF=200:1).Where the film-forming temperature was not higher than 550° C., the filmwas formed under a pressure of 1.4 Torr in order to shorten the timerequired for forming the sample of HCD-SiN film. As apparent from thegraph, the etching rate was increased with decrease in the film-formingtemperature. The graph also shows that the etching rate of the DCS-SiNfilm formed at 700° C. was 0.19 nm/min when etched with a dilutehydrofluoric acid (water:HF=200:1). It follows that the etchingselectivity ratios of the HCD-SiN films formed at 600° C. and 450° C.were 1.6 and 119, respectively, relative to the DCS-SiN film formed at700° C. Also, the etching selectivity ratio of the FICD-SiN film formedat 550° C. as in the third embodiment was found to be 24.

Where a hot phosphoric acid is used as an etchant, it is known to theart that the etching selectivity ratio of the HCD-SiN film formed at650° C. to the DCS-SiN film formed at 700° C. is 3.7. In other words,the tendency that the etching rate is increased with decrease in thefilm-forming temperature, which is observed in the case of using adilute hydrofluoric acid as an etchant, is also considered to take placein the case of using a hot phosphoric acid as an etchant.

FIG. 14 is a graph showing the relationship between the wet etching rateand the N₂ flow rate. As shown in the graph, the etching rate of thesilicon nitride film formed in the presence of a nitrogen gas (N₂)stream is about twice as high as that of the silicon nitride film formedwithout using a nitrogen gas stream in the case of using Si₂Cl₆ as theSi raw material. The etching rate shown in FIG. 14 indicates that theetching selectivity ratio of the HCD-SiN film formed in the presence ofa nitrogen gas stream is about 240 relative to the DCS-SiN film formedat 700° C. Similar effects are considered to be produced in respect ofthe DCS-SiN films formed at different temperatures. It follows that thewet etching rates of the HCD-SiN film and the DCS-SiN film can becontrolled by controlling the film-forming temperatures, making itpossible to achieve a large etching selectivity ratio.

As described above, a large wet etching selectivity ratio can beprovided by using the HCD-SiN film of the present invention for thesilicon nitride film of the dummy gate and the conventional DCS-SiN filmfor the gate side wall insulating film.

In this fashion, the reduction in the thickness of the gate side wallDCS-SiN film can be effectively suppressed in the step of removing thepolysilicon film 124 by the CDE process. As a result, the substrate isnot damaged in the CDE process. Also, since the polysilicon film 124 andthe HCD-SiN film 125 can be etched appropriately, the dummy gate 127 canbe removed easily.

In the third embodiment of the present invention, a laminate structureconsisting of the polysilicon film 124 and the HCD-SiN film 125 is usedas the dummy gate 127 as in the prior art. It should be noted that thepolysilicon film 124 serves to suppress without fail the etching of thegate side wall DCS-SiN film 130 in the step of etching the HCD-SiN film125. However, the polysilicon film 124 need not be formed in the casewhere a sufficiently large etching selectivity ratio can be ensuredbetween the dummy gate 127 and the gate side wall DCS-SiN film 130.Specifically, in the third embodiment of the present invention, asufficiently large etching selectivity ratio is provided between theHCD-SiN film 125 and the gate side wall DCS-SiN film 130. Therefore, itis possible to use the HCD-SiN film 125 alone as the dummy gate 127. Inthis case, it is possible to omit the step of forming the polysiliconfilm 124, the removing step with CDE, and the step of forming the oxidefilm 128 shown in FIG. 1D.

In the next step, a gate insulating film 133 is formed within the trenchresulting from removal of the dummy gate 127, as shown in FIG. 11H. Thegate insulating film 133 is formed of a high dielectric constantmaterial such as Ta₂O₅ or (Ba, Sr)TiO₃.

In this embodiment, a Ta₂O₅ film is used as the gate insulating film133. In forming the Ta₂O₅ gate insulating film 133, the substratesurface is irradiated first with oxygen radicals to form a SiO₂ film(not shown) in a thickness of about 0.2 to 0.3 nm, followed by forming asilicon nitride film (not shown) by using ammonia, silane, etc. Further,a Ta₂O₅ film is formed as the gate insulating film 133 in a thickness ofabout 1 nm on the silicon nitride film.

Finally, a TiN film 134 having a thickness of about 10 nm and used as agate electrode and an Al film 135 having a thickness of about 2250 nmare formed on the entire surface to fill the trench resulting fromremoval of the dummy gate 127, followed by removing by CMP the excessgate insulating film 133, TiN film 134 and Al film 135 positionedoutside the trench so as to flatten the surface, as shown in FIG. 11I,thereby obtaining a desired MOS transistor.

In each of the first to third embodiments, a silicon nitride film isformed for preventing short-circuiting between a lower capacitorelectrode and a plug electrode in a so-called MO portion, i.e., aportion where a conductive portion connected to the silicon substrate isformed). However, it is also possible to use a silicon nitride film forother purposes.

Fourth Embodiment

FIGS. 15A to 15D are cross sectional views collectively showing a methodof manufacturing a semiconductor device according to a fourth embodimentof the present invention. These drawings show a cross section of a MOStransistor included in a DRAM and the contact opening portion in adirection perpendicular to the width direction of the channel.

FIG. 15A shows that a gate electrode 200 prepared by selectivelyremoving by RIE a laminate structure consisting of a polysilicon film208 formed on a silicon substrate 201 with a gate insulating film (notshown) interposed therebetween, a WN (tungsten nitride) film 209 formedon the polysilicon film 208, a W (tungsten) film 210 formed on the WNfilm 209, and a SiN film 212 formed on the W film 210 is formed on thesilicon substrate 201. Then, As ions are implanted under an acceleratingenergy of 15 keV and at a dose of 5×10¹³ cm⁻² into surface regions ofthe silicon substrate 201 with the gate electrode 200 used as a mask soas to form an n⁻-type source region 206 and an n⁻-type drain region 207on both sides of the gate electrode 200.

In the next step, a SiN film is formed on the entire surface of thesilicon substrate 201 by an LPCVD method using DCS as a raw material,followed by etching back the SiN film to form a gate side wallinsulating film 211 consisting of SiN on only the side walls of the gateelectrode 200, as shown in FIG. 15B. As a result, formed is a basestructure consisting of the silicon substrate 201, the gate electrode200 and the gate side wall insulating film 211 and having a steppedstructure in which the aspect ratio is about 2 and the narrowest spacein the cell portion is about 0.15 μm.

Then, an HCD-SiN film 213 is formed on the entire surface of the basestructure in a thickness of 15 nm by an LPCVD method usinghexachlorodisilane (HCD) and ammonia (NH₃) as raw material gases and anitrogen gas (N₂) as a carrier gas. The HCD-SiN film 213 is formed at450° C. under a reactor inner pressure of 1.4 Torr and at a flow rateratio of ammonia:HCD of 1000:50. The HCD-SiN film 213 thus formed actsas a RIE stopper film in the subsequent step of forming a contact holein the interlayer insulating film, as shown in FIG. 15B.

The HCD-SiN film 213 was formed at a rate of 2.6 nm/min. Also, it waspossible to form the HCD-SiN film even if a nitrogen gas was not allowedto flow during the HCD-SiN film forming process.

As shown in FIG. 6 referred to previously, the RIE selectivity ratio inthe case of using HCD was substantially equal to that in the case offorming a SiN film by using the conventional DCS. Therefore, no problemis generated in the where the HCD-SiN film acting as an etching stopperis formed in a thickness of 15 nm as in the conventional case.

In the next step, a BPSG film is formed as an interlayer insulating film220, followed by applying a heat treatment at 800° C. under anatmosphere containing H₂ and O₂ (2H₂+O₂→2H₂O) so as to increase thedensity of the interlayer insulating film 220. Then, the surface of theinterlayer insulating film 220 was removed in a thickness of about 370nm by CMP using the SiN film 213 as a CMP stopper so as to flatten thesurface of the interlayer insulating film 220. Further, a resistcoating, light exposure and development were performed after theflattening step, followed by applying RIE to the interlayer insulatingfilm (BPSG film) 220 so as to form a contact hole 214, as shown in FIG.15C. It should be noted that the HCD-SiN film 213 exhibits an etchingrate lower than that of the BPSG film and, thus, acts as a RIE stopperso as to stop RIE. The HCD-SiN film acting as a RIE stopper in the stepof forming a contact hole in the cell portion as described above canalso be used as a RIE stopper in the step of forming a contact hole inthe peripheral portion.

In the next step, the SiN film 213 at the bottom of the contact hole 214is subjected to RIE by changing the gas conditions. In this case,however, it is necessary to employ a weak etching condition so as not toetch the underlying silicon substrate 201, with the result that the SiNfilm tends to fail to be etched completely. The residual SiN film isremoved in the subsequent treatment with a dilute hydrofluoric acid forremoving the native oxide film in a thickness of 1 nm, which isperformed in preparation for the next step for burying a polysiliconlayer acting as a contact plug, as shown in FIG. 15D.

As apparent from FIG. 13 referred to previously, the etching rate of theHCD-SiN film formed at 450° C. is not lower than 20 nm/min, which is atleast twice the etching rate of the native oxide film, though theetching rate of the HCD-SiN film formed at 550° C. or more under apressure of 0.5 Torr is low, i.e., 20 Å/min (i.e., 2 nm/min). Since theetching rate of the HCD-SiN film is at least twice the etching rate ofthe native oxide film as pointed out above, the SiN film remaining afterthe pretreatment with the dilute hydrofluoric acid can be removedcompletely even if the RIE is nonuniform over the entire surface inremoving the SiN film in the step shown in FIG. 15D. It follows that itis possible to avoid a defective contact caused by the residual SiNfilm.

Incidentally, the experimental data given in FIG. 13 cover the casewhere a nitrogen gas was not allowed to flow during formation of theHCD-SiN film. Where a nitrogen gas is allowed to flow, the etching rateby the etching with a dilute hydrofluoric acid at, for example, 450° C.is increased to 45 nm/min so as to further facilitate the etching.

The present inventors have confirmed that, under a film-formingtemperature of 450° C., an HCD-SiN film can be formed at 2 nm/min,supporting that the HCD-SiN film formation at 450° C. can be practicallyemployed sufficiently thought the film-forming rate is somewhat lowerthan 3 nm/min for the DCS-SiN film formation at 780° C. It has also beenconfirmed that a plasma SiN film can be formed at 370° C. at a higherfilm-forming rate of 100 nm/min.

As described above, it is possible to form a SiN film having a lowdensity and a low permittivity by forming the SiN film at about 450° C.by using HCD.

The low permittivity is deeply related to the low density. Specifically,the permittivity and the density are considered to meet theClausius-Mossotti formula given on page 542 of “Solid State Physics(Saunders College Inc. (1976), by Ashcroft Mermin”, i.e.,(ε−1)/(ε+2)={(N_(o)×α)/(3xε₀)}×(ρ/M)  Clausius-Mossotti formula

ρ represents the density, ε represents the permittivity, M representsthe molecular weight, and α represents the polarizability. Also, ε₀ andN₀, which are constants, represent the permittivity under vacuum andAvogadro's number, respectively. The formula indicates that the densityand the permittivity are proportional to each other. In other words, itis considered reasonable to understand that the HCD-SiN of a lowpermittivity can be put to a practical use because it is possible toprepare an HCD-SiN film of a low density.

On the other hand, the thickness the HCD-SiN film required for allowingthe HCD-SiN film to perform the function of a RIE stopper film is equalto that of the DCS-SiN film, and the HCD-SiN film has a permittivitylower than that of the DCS-SiN film. It follows that the HCD-SiN filmpermits ensuring the RIE barrier characteristics equal to that of theconventional DCS-SiN film and also permits markedly decreasing thecapacitance between adjacent wirings.

When it comes to the transistor characteristics, it is generally knownto the art that the interfacial level at the interface of the gateinsulating film is decreased by the hydrogen sinter so as to increasethe retention time of the transistor. This is said to be caused by thetermination effect that that the defect causing the leakage current isdecreased by the termination of the silicon dangling bond by hydrogen.

The hydrogen concentration within the HCD-SiN film is 1×10²² cm⁻³, whichis higher than that in the conventional LP-SiN film, and the hydrogengas is released at a temperature higher than the film-formingtemperature so as to bring about a more prominent termination effect.

FIG. 16 is a graph showing the device element profile determined by SIMSin a depth direction of the HCD-SiN film both before and after the heattreatment at 1,000° C. for 30 minutes. Specifically, sputter etching wasperformed from the surface, and the count number per second (CPS) ofeach of hydrogen and chlorine atoms in the etched portion was determinedby SIMS to prepare the graph of FIG. 16. The time (minutes) is plottedon the abscissa, with the count number per second (CPS) being plotted onthe ordinate of the graph. The experimental data before the heattreatment are denoted by solid lines, and those after the heat treatmentare denoted by dotted lines. The range between 0 minute and about 9minutes on the abscissa of the graph represents a region correspondingto the HCD-SiN film.

As shown in the graph, the hydrogen was found to be decreased by theheat treatment from about 1.5×10⁵ CPS to about 4×10² CPS, i.e.,decreased to less than 1/100 of the value before the heat treatment. Onthe other hand, a significant difference was not recognized between thechlorine concentration before the heat treatment and that after the heattreatment.

Incidentally, the hydrogen concentration before the annealingcorresponds to 1×10²² cm⁻³, and the hydrogen concentration after theannealing corresponds to a value not higher than 1×10²⁰ cm⁻³ (not higherthan the detectable limit). On the other hand, the chlorineconcentration corresponds to 1×10²¹ cm⁻³. It has been found that, sincea large amount of hydrogen is released from the HCD-SiN film by theannealing, the silicon dangling bond can be effectively terminated.

As described above, the SiN film formed by a chemical vapor depositionmethod using plasma (P-CVD method) or by a low pressure chemical vapordeposition method (LPCVD method) is poor in step coverage. If the SiNfilm is formed within a trench having an aspect ratio of about 2, thefilm is rendered thick in the uppermost portion of the stepped portionand thin in the lower portion and the side wall portion. Also, anoverhanging portion tends to be formed in the edge at the uppermostportion.

Under the particular condition, it is difficult for the raw material gasto enter the space below the overhanging portion in the step of formingthe interlayer insulating film, resulting in failure to bury theinterlayer insulating film (such as BPSG film). Also, the particular SiNfilm noted above is not homogeneous, and the edge portion fails toperform a sufficient function of a stopper.

On the other hand, where a silicon raw material having chlorinesubstituted for the hydrogen of silane such as dichlorosilane (DCS) ortetrachlorosilane, a satisfactory step coverage can be obtained.Specifically, the step coverage of 100% can be obtained even if theaspect ratio is about 20. However, the compound producing the particulareffect is not limited to the silane-based compound. The presentinventors have found that a homogeneous film covering the steppedstructure satisfactorily can be obtained by an LPCVD method using HCDthat is a chloride of disilane.

In the fourth embodiment, an HCD-SiN film is used as a SiN film actingas a RIE stopper. However, the SiN film 212 formed on the gate electrodeor the SiN film 211 formed on the gate side wall also produces theeffect of decreasing the permittivity produced by the HCD-SiN film. Inother words, since a SiN film having a low permittivity can be obtainedby forming an HCD-SiN film as each of these SiN films 212 and 211, it ispossible to decrease the capacitance between adjacent wirings.

Also, in the fourth embodiment, a laminate structure of polysilicon/WN/Wwas used as the gate electrode. Needless to say, however, a metal gateelectrode made of a metal alone or a polysilicon gate electrode can beused in place of the laminate structure noted above.

Fifth Embodiment

FIGS. 17a and 17B are cross sectional views collectively showing amethod of manufacturing a semiconductor device according to a fifthembodiment of the present invention. These drawings show cross sectionsin a direction perpendicular to the Cu wiring included in thesemiconductor device.

Specifically, FIG. 17A shows that a tantalum nitride (TaN) film 204 as abarrier metal film and a metal wiring 201′ as a Cu wiring are buried ina wiring trench formed in a TEOS interlayer insulating film 203. Then,the surface is flattened by CMP so as to provide a base structure(wiring layer). After the flattening step, a SiN film 205 is formed in athickness of 10 nm at 450° C. on the entire surface by an LPCVD methodusing HCD and NH₃ as raw material gases. During the film formation, theinner pressure of the reactor is set at 1.4 Torr and the flow rate ratioof ammonia:HCD:nitrogen is set at 1000:50:50.

The following experiment was conducted for measuring the breakdownvoltage of the SiN film 205. For preparing a sample used for theexperiment, a SiN film was formed in a predetermined thickness on asilicon substrate, followed by forming a Cu film on the SiN film. Then,a predetermined voltage was applied between the silicon substrate andthe Cu film so as to measure the change with time in the leakagecurrent. FIG. 18 shows the results.

FIG. 18 is a graph showing the results of a so-called “BT test”(bias-temperature stress test), in which the application time (stresstime, minutes) is plotted on the abscissa, and the leakage current isplotted on the ordinate. Specifically, FIG. 18 shows the change withtime in the leakage current, covering the case where any of a P-SiN filmhaving a thickness of 50 nm, an HCD-SiN film having a thickness of 10 nmand an HCD-SiN film having a thickness of 50 nm is formed on a siliconsubstrate, followed by forming a Cu film on the SiN film, and a voltageof 1 MV/cm was applied between the silicon substrate and the Cu film at100° C. so as to measure the change with time in the leakage current(amperes).

In general, the Cu diffusion is said to be caused by Cu⁺ ions, and thebias is applied under the condition that the Cu electrode bears a higherpotential so as to permit the Cu¹⁺ ions to be diffused into the siliconsubstrate. In the graph of FIG. 18, the leakage current is plotted onthe ordinate, and the stress time is plotted on the abscissa. A filmthat is not broken over a longer time (leakage current being stable) issaid to have a higher barrier property. As apparent from the graph, theHCD-SiN film having a thickness of any of 50 nm and 10 nm is superior tothe plasma SiN film in the barrier property to the Cu diffusion.

The term “breakdown” implies the point where the leakage current israpidly changed. FIG. 18 shows that the breakdown occurs in about 13minutes in the P-SiN film having a thickness of 50 nm, in about 1,000minutes in the HCD-SiN film having a thickness of 10 nm, and in 5,000minutes or more in the HCD-SiN film having a thickness of 50 nm.

The HCD-SiN film is superior to the plasma-SiN film in the barrierproperty in spite of the fact that the HCD-SiN film is thinner than theplasma-SiN film. The reason for the particular phenomenon is consideredto reside in that the HCD-SiN film has a higher chlorine concentration.

FIG. 19 is a graph showing the relationship between the break time,which is plotted on the ordinate, and the chlorine concentration, whichis plotted on the abscissa. As apparent from the graph, the break timeis increased with increase in the Cl concentration. In other words, Clis not contained at all in the P-SiN film because a Cl-containing rawmaterial is not used for forming the P-SiN film, leading to a very shortbreak time. On the other hand, the HCD-SiN film has a very high Clconcentration of 3.4×10²¹ cm⁻³, leading to a break time exceeding 1,000minutes.

It should be noted that Cl has a large electronegativity and, thus, ischarged negative. As a result, the Cu¹⁺ diffusion species are consideredto be trapped by the Cl sites, leading to a long break time. Also, theHCD-SiN film formed at a low temperature is known to have a smallpermittivity of 5.4, as shown in FIG. 3. In other words, if an HCD-SiNfilm is used, it is possible to obtain a high insulation breakdownvoltage even in the case of using a thinner film having a smallpermittivity. The reduction in the capacitance between adjacent wiringsachieved by the use of the HCD-SiN film is about 20%, compared with theuse of the conventional DCS-SiN film.

The fourth and fifth embodiments of the present invention are notlimited to the semiconductor device and the method of manufacturing thesemiconductor device described above. In other words, these embodimentscan be applied widely to an insulating film requiring a low permittivityand to an insulating film requiring a high breakdown voltage.

In each of the fourth embodiment and fifth embodiment of the presentinvention described above, hexachlorodisilane (HCD) is used as the rawmaterial of the silicon nitride film. However, the raw material of thesilicon nitride film is not limited to HCD. Specifically, it is possibleto use as the raw material any kind of silicon chloride represented by ageneral formula Si_(n)Cl_(2n+2), where n is an integer not smaller than2, or Si_(n)Cl_(2n+2−x)H_(x), where x is an integer not smaller than 0and not larger than 2n+1. By using a gaseous material having a largenumber of Cl radicals, it is possible to form a silicon nitride filmhaving a high chlorine concentration.

Sixth Embodiment

FIGS. 20A and 20B are cross sectional views showing a method of buryinga silicon oxide film in a concave portion between adjacent gateelectrodes (or gate wirings) by a method according to a sixth embodimentof the present invention.

Specifically, FIG. 20A shows the construction of the gate electrodeformed on a silicon substrate 310 by an ordinary method and theperipheral structure. As shown in the drawing, the gate electrode isformed of a laminate structure comprising a polysilicon film 311, a WNfilm 312 and a W film 313. A gate insulating film 314 is formed belowthe gate electrode. Also, a cap silicon nitride film 315 is formed onthe upper surface of the gate electrode, and a side wall silicon nitridefilm 316 is formed on the side wall of the gate electrode. A linersilicon nitride film 317 is formed around the gate electrode of theparticular construction, and a BPSG film 318 is formed on the sidesurfaces of the liner silicon nitride film 317. Further, a diffusionlayer 319 forming the source/drain region is formed between the adjacentgate electrodes.

Then, a silicon oxide film 321 is formed on the substrate having aconcave portion 320 formed between the adjacent gate electrodes, asshown in FIG. 20B.

Specifically, after formation of the structure shown in FIG. 20A, asilicon nitride film is formed by an LPCVD method using HCD and ammoniaas raw material gases. It is possible to use a nitrogen gas or a raregas as a diluting gas. The silicon nitride film is formed at atemperature of 250° C., an NH₃/HCD flow rate ratio of 1000/10, and areactor inner pressure of 1.4 Torr. As a result, formed on the entiresurface is a silicon nitride film containing chlorine (SiN:HClcomposition). The film-forming rate under the conditions given above wasfound to be 0.26 nm/min.

FIG. 21 is a graph showing the SIMS profile of each device elementcontained in the silicon nitride film thus formed. The concentrations ofoxygen (O), hydrogen (H) and chlorine (Cl) are given in the graph ofFIG. 21. Also, an ion count numbers (CPS) of nitrogen (N) is shown inFIG. 21. In this experiment, a silicon nitride film was formed at 450°C. on the upper surface of an HCD-SiN film formed at 250° C. in order toprevent the HCD-SiN film from being oxidized. FIG. 21 shows that theHCD-SiN film formed at 250° C. contains about 1×10²² cm⁻³ of chlorine.

In the next step, the formed silicon nitride film is oxidized under mildconditions so as to convert the silicon nitride film into a siliconoxide film 321 containing chlorine, as shown in FIG. 20B. The oxidizingtreatment was performed for 10 minutes under, for example, an oxygen gasatmosphere under an oxidizing temperature of 600° C. By this oxidizingtreatment, the film thickness is increased by about 20%, e.g., the filmthickness is increased from 22.9 nm to 27.8 nm. Also, the refractiveindex is decreased from 1.56 to 1.43 to exhibit a value substantiallyequal to that of the ordinary silicon oxide film. In short, by theoxidizing treatment under mild conditions, the volume of the siliconnitride film is increased, and the silicon nitride film is convertedinto the silicon oxide film 321. Incidentally, the silicon nitride filmformed under the conditions given above is converted into a siliconoxide film, if the nitride film is allowed to stand under the airatmosphere of room temperature for a long time.

FIG. 22 is a graph showing the SIMS profile of each device elementcontained in the silicon oxide film converted from the silicon nitridefilm. The concentrations of oxygen (O), hydrogen (H) and chlorine (Cl)are given in the graph of FIG. 22. Also, an ion count number (CPS) ofnitrogen (N) is shown in FIG. 22. The silicon oxide film contains about6×10¹⁹ cm⁻³ of chlorine and about 1×10²¹ cm⁻³ of hydrogen. Themeasurement was performed by using Cs⁺ as the primary ion species undera primary accelerating energy of 5 keV and a sputter rate of 0.4 nm/sec.Also, the ion count of NSi43 (ion of segment consisting of nitrogenhaving an atomic weight of 14 and Si having an atomic weight of 29) wasfound to be 6×10² (CPS). Incidentally, the ion count of the siliconnitride film formed at 650° C. by using HCD and containing 4×10²² cm⁻³of nitrogen was found to be 5×10⁵ CPS under the measuring conditionsgiven above.

In the sixth embodiment, a silicon nitride film containing chlorine isformed by an LPCVD using HCD as a raw material, followed by oxidizingthe silicon nitride film into a silicon oxide film, thereby burying thesilicon oxide film uniformly and homogeneously in a concave portion or astepped portion. Also, even if a void is present in the silicon nitridefilm, it is possible to obtain a silicon oxide film that does notinclude the void because the volume is increased when the siliconnitride film is converted into the silicon oxide film.

In the example described above, the silicon nitride film was formed at250° C. However, similar effects can be obtained by suitably selectingthe oxidizing conditions, if the film-forming temperature is lower than450° C. Also, in the example described above, an oxygen gas (O₂) wasused as the oxidizing atmosphere. However, it is also possible to employan ozone (O₃) atmosphere. In the case of employing an ozone atmosphere,the silicon nitride film can be converted into the silicon oxide film ata lower temperature. Further, the silicon nitride film can be convertedinto the silicon oxide film by an oxidizing treatment under a steam orby the oxidizing treatment using chemicals acting as an oxidizing agentsuch as an ozone solution or a hydrogen peroxide solution.

Seventh Embodiment

FIGS. 23A to 23C are cross sectional views showing a step of burying asilicon oxide film in a device element isolating trench in an STIstructure according to a seventh embodiment of the present invention.

Specifically, FIG. 23A shows the structure at the time when a deviceelement isolating trench 331 is formed on a silicon substrate 330 by anordinary method. As shown in the drawing, a silicon oxide film 332 isformed on the surface except the trench portion 331, and a siliconnitride film 333 is formed on the silicon oxide film 332. Further, athin silicon oxide film 334 is formed on the entire surface.

FIG. 23B shows that a silicon oxide film 335 containing chlorine isformed on the substrate having the device element separating trench 331formed thereon. The silicon oxide film 335 is obtained by forming firsta silicon nitride film by an LPCVD method using HCD as a raw materialgas, followed by oxidizing the silicon nitride film to convert thesilicon nitride film into the silicon oxide film 335, as in the sixthembodiment.

Finally, that portion of the silicon oxide film 335 which is positionedoutside the device element separating trench 331 is removed by CMP asshown in FIG. 23C so as to finish the device element separating step bySTI.

In the seventh embodiment, a silicon oxide film that does not include avoid can be buried uniformly and homogeneously within the device elementseparating trench as in the sixth embodiment.

Eighth Embodiment

FIGS. 24A to 24F are cross sectional views collectively showing a methodof burying a silicon oxide film in a concave portion of a base structureaccording to an eighth embodiment of the present invention. The basestructure used in this embodiment includes the structure of the sixthembodiment shown in FIG. 20A or the structure of the seventh embodimentshown in FIG. 21A.

In each of the sixth and seventh embodiments, a silicon nitride filmcontaining chlorine is formed to fill an entire region of a concaveportion by an LPCVD method using HCD as a raw material gas, followed byconverting the silicon nitride film into a silicon oxide film. In theeighth embodiment, however, the step of forming a silicon nitride filmand the step of converting the silicon nitride film into a silicon oxidefilm are repeated a plurality of times so as to fill finally the entireregion of the concave portion with the silicon oxide film.

In the first step, a silicon nitride film 352 containing chlorine isformed within a concave portion 351 formed in an underlying layer 350,as shown in FIG. 24A. The silicon nitride film 352 is formed under theconditions equal to those in the sixth embodiment.

Then, the silicon nitride film 352 is oxidized so as to be convertedinto a silicon oxide film 353 containing chlorine. The convertingconditions are also equal to those in the sixth embodiment.

After formation of the silicon nitride film 354 containing chlorine, thesilicon nitride film 354 is oxidized as in FIGS. 24A and 24B so as to beconverted into the silicon oxide film 355, as shown in FIGS. 24C and24D. The step of forming the silicon nitride film and the step ofconverting the silicon nitride film into the silicon oxide film arerepeated a plurality of times so as to form finally a silicon oxide film356 containing chlorine in a manner to fill completely the entire regionwithin the concave portion, as shown in FIG. 24E.

According to the eighth embodiment, the step of forming a siliconnitride film and the step of converting the silicon nitride film into asilicon oxide film are repeated a plurality of times, making it possibleto decrease the thickness of each silicon nitride film. It follows that,even where the concave portion is deep and, thus, it is difficult toconvert the silicon nitride film into the silicon oxide film by a singleoxidizing treatment, the silicon oxide film can be formed easily withinthe entire region of the concave portion.

In each of the sixth to eighth embodiments described above, a siliconnitride film containing chlorine is formed by an LPCVD method. However,it is also possible to allow the silicon nitride film to further containat least one of phosphorus (P) and boron (B). For allowing the siliconnitride film to contain phosphorus, PH₃ is used together with HCD andammonia used as the raw material gases. Also, for allowing the siliconnitride film to contain boron, B₂H₆ is used together with HCD andammonia used as the raw material gases.

By applying an oxidizing treatment to a silicon nitride film containingat least one of phosphorus and boron as in the sixth embodiment, asilicon oxide film containing at least one of phosphorus and borontogether with chlorine, e.g., a BPSG film containing chlorine, can beformed within a concave portion. Incidentally, it is desirable for thesilicon oxide film to contain 3 to 10% by weight of each of phosphorusand boron.

If the silicon oxide film is allowed to contain phosphorus and boron, itis possible to obtain a gettering effect of impurities such as Na and Fethat bring about deterioration of electrical characteristics, not tomention the effects described previously in conjunction with the sixthto eighth embodiments. Also, where employed in the structure shown FIGS.20A and 20B, the underlying silicon nitride film can be etched at a highselectively in forming a contact hole by RIE in the silicon oxide film321 (silicon oxide film containing phosphorus or boron in addition tochlorine in this case), making it possible to form the contact holeeasily.

Ninth Embodiment

The background of the motivation of the present invention will now bedescribed. Various technical problems must be solved for realizing asemiconductor device of the next era by further enhancing the degree ofintegration and miniaturization.

For example, the problems of a silicon nitride film, which is applied tovarious points, will now be described. Specifically, a silicon nitridefilm is used in various portions of a semiconductor integrated circuitincluding, for example, an electrical insulating film, a capacitor or agate insulating film, an etching stopper, a barrier film, and apassivation film.

The problems that must be solved in applying a silicon nitride film to asemiconductor device can be roughly classified into the three problemspointed out below:

1. In a semiconductor device of the next era having a higher degree ofintegration and an advanced miniaturization, a silicon nitride film mustbe formed to cover sufficiently an underlying film having a fineirregularity. In general, an LPCVD method is employed for forming asilicon nitride film having a good step coverage. In the case ofemploying an LPCVD method, a silicon nitride film is formed in generalat about 800° C. However, the film-forming temperature of about 800° C.is unduly high because a metal wiring, a harrier metal film, a silicidefilm and a shallow diffusion layer included in the semiconductor deviceof the next era are low in resistance to heat.

2. The silicon nitride film used as an etching stopper film or as a hardmask is low in its resistance to etching. In order to ensure a requiredresistance to etching, it is necessary to increase the thickness of thesilicon nitride film. If the film thickness is increased, a long time isrequired for forming a silicon nitride film, leading to a large thermalbudget. Under a large thermal budget, various problems such aselongation (re-diffusion) and inactivation of the diffusion layer,agglomeration and corrosion of a metal film and agglomeration of asilicide layer are generated in the portion where the resistance to heatis low so as to deteriorate the device characteristics. Also, theproductivity is low so as to increase the manufacturing cost.

3. A silicon nitride film has a high permittivity 7.5. If an insulatingfilm having a high permittivity is used in a plurality of portions, theparasitic capacitance between adjacent wirings or between adjacentwiring layers is increased. If miniaturization of the integrated circuitis further promoted in future, the distances between adjacent gateelectrodes and between adjacent wirings are further decreased.Therefore, if an insulating film having a permittivity of the presentlevel is used, the parasitic capacitance is further increased. Whatshould also be noted is that, if the parasitic capacitance is increased,the effective capacitance of, for example, the capacitor holding thestored information is decreased by an amount corresponding to theparasitic capacitance. In order to make up for the decreasedcapacitance, it is necessary to increase the capacitance and area of thecapacitor. This brings about an enlargement of the chip size and anincreased manufacturing cost.

FIGS. 25A to 25D are cross sectional views in a direction perpendicularto the longitudinal direction of the channel of a MOS transistorincluded in a DRAM cell. These drawings collectively show a method ofmanufacturing a semiconductor device according to the ninth embodimentof the present invention.

In the first step, the structure shown in FIG. 25A is prepared by theknown method. The structure shown in FIG. 25A comprises a plurality ofMOS transistors constituting a memory cell, gate electrodes, and a metalwiring formed on the gate electrodes and buried in a trench so as toconstitute a bit line or a word line.

To be more specific, the structure shown in FIG. 25A comprises a siliconsubstrate 401, a polysilicon film (gate) 402, a tungsten nitride film(gate) 403, a tungsten film (gate) 404, a silicon nitride film 405, asilicon oxide film (interlayer insulating film) 406, a trench 407, asilicon nitride film 408, a barrier metal film, e.g., Ti film/TiN film,409, and a metal wiring, e.g., W wiring, 410.

A maximum aspect ratio of that portion of the trench 407 in which themetal wiring 410 is not buried is about 1 (depth of about 150 nm and awidth of about 150 nm). The trench 407 is formed by successivelydepositing the harrier metal film 409, the metal wiring 410, a metalfilm, e.g., a TiN film, and another metal film, e.g., a W film, followedby etching back these metal films.

Then, a silicon nitride film 411 acting as a cap insulating film isformed in a thickness of 200 nm by an LPCVD method excellent incontrollability and covering properties, as shown in FIG. 25B. Thesilicon nitride film 411 is required to be homogeneous and uniform. Inaddition, the silicon nitride film 411 must be formed not to leave aclearance in the trench 407. Therefore, a film-forming method exhibitinggood covering properties such as an LPCVD method is employed for formingthe silicon-nitride film 411.

It should also be noted that the barrier metal film 409 is not resistantto heat. Therefore, in the method of forming a silicon nitride filmusing dichlorosilane (DCS) as a raw material, i.e., in the conventionalfilm-forming method requiring a high temperature and a long film-formingtime, e.g., 700° C. for 330 minutes, the titanium silicide layer in thecontact portion is agglomerated or the impurities in the diffusion layerare inactivated.

Such being the situation, the silicon nitride film 411 is formed in theninth embodiment of the present invention by an LPCVD method using asilicon source capable of forming a film at a low temperature not higherthan 700° C. such as HCD and ammonia, at a film-forming temperature of600° C., under a reactor inner pressure of 0.5 Torr and anammonia/HCD/methyl amine flow rate ratio of 2000/20/20. For thispurpose, it is desirable to set a film-forming temperature of thesilicon nitride film at a temperature not higher than 700° C.

In the ninth embodiment of the present invention, the silicon nitridefilm 411 is formed at a rate of 1.3 nm/min, and contains hydrogen,chlorine and carbon as impurities. The hydrogen concentration is 5×10²¹cm⁻³, the chlorine concentration is 9×10²⁰ cm⁻³, and the carbonconcentration is 5×10²¹ cm⁻³. In order to obtain a sufficient effect ofthe present invention, it is desirable for each of the chlorineconcentration and the carbon concentration to be at least 4×10²⁰ cm⁻³.

In the ninth embodiment, methyl amine is used as a carbon source.Alternatively, it is also possible to use as a carbon source ahydrocarbon compound or an amine compound such as methane, ethane,ethylene, acetylene and dimethyl amine.

In the next step, that portion of the silicon nitride film which ispositioned outside the trench 407 is removed by CMP so as to flatten thesurface, as shown in FIG. 25C. In the flattening step, the silicon oxidefilm 406 is used as the CMP stopper. The CMP is performed under thegeneral condition for polishing a silicon nitride film. For example, theCMP is performed by using a slurry containing small silica particles and2.5% by weight of phosphoric acid under a polishing pad load of 200 gf.

The polishing rate in the CMP treatment is not affected by the loweredfilm-forming temperature and by the change in the silicon source. Underthe polishing conditions given above, the polishing rate of the siliconnitride film formed by the conventional method or by the method of theninth embodiment of the present invention was found to be 20 nm/min. Inother words, even if a silicon nitride film acting as a cap insulatingfilm is formed by the method of the present invention, it has been foundpossible to obtain the polishing characteristics for flattening thesurface equal to those of the conventional method.

As described above, a silicon nitride film can be formed at a lowtemperature in the ninth embodiment of the present invention, making itpossible to eliminate the problem that the device characteristics aredeteriorated in the step of forming a cap insulating film (i.e., thestep of forming the silicon nitride film 411).

It has also been found that the method according to the ninth embodimentof the present invention permits lowering the density of the siliconnitride film so as to diminish the permittivity of the silicon nitridefilm.

FIG. 26 is a graph showing the relationship between the permittivity andthe deposition temperature in respect of a silicon nitride film to whichmethyl amine is not added, i.e., a silicon nitride film not havingcarbon introduced therein. Incidentally, the permittivity of the siliconnitride film having carbon introduced therein was found to be 6.4 at afilm-forming temperature (deposition temperature) of 600° C. The whitecircle and black circles shown in the graph represent permittivity ofDCS-SiN and HCD-SiN, respectively.

In the next step, a resist pattern (not shown) is formed, and thesilicon oxide film 406 is removed by RIE using the silicon nitride film411 and the resist pattern as a mask so as to form a contact hole 412 byself-alignment, as shown in FIG. 25D.

The RIE etching rate of the silicon nitride film 411 is substantiallyirrelevant to the film-forming temperature.

FIG. 27 is a graph showing the relationship between the RIE rate of asilicon nitride film that does not contain carbon and the film-formingtemperature. As apparent from the graph, the RIE rate of the particularsilicon nitride film is equal to that of a DCS-SiN film formed at 700°C. (conventional silicon nitride film) until the film-formingtemperature is lowered to 550° C., though the RIE rate of the particularsilicon nitride film is somewhat increased if the film-formingtemperature is further lowered to 450° C.

FIG. 28 is a graph showing the relationship between the RIE rate and thecarbon concentration in a silicon nitride film. As apparent from thegraph, the RIE rate can be lowered by about 20% by introducing carboninto a silicon nitride film, compared with a silicon nitride film nothaving carbon introduced therein.

In the RIE step shown in FIG. 25C, corners of the exposed portion of thesilicon nitride film 411, which is not covered with the resist patternand functions as a mask, are removed by the etching species such as ionsand radicals of RIE so as to make roundish the exposed portion of thesilicon nitride film 411.

FIG. 29 shows the silicon nitride film 411 having an upper portion maderoundish in the RIE step. The dotted lines in the drawing denote thesilicon nitride film 411 after completion of the CMP treatment andbefore the RIE step.

It is necessary for the silicon nitride film acting as a cap insulatingfilm to perform the function of electrically insulating an electrodeformed exactly sideward of the silicon nitride film from the lowerelectrode of a capacitor formed above the silicon nitride film.Therefore, it is necessary for the silicon nitride film acting as a capinsulating film to have a reasonable thickness after completion of theRIE step.

It has been found that the polished amount of the conventional siliconnitride film not having carbon introduced therein is 18 nm in an upperportion and 70 nm in the corner portion. On the other hand, the polishedamount has been found to be 14 nm in an upper portion and 54 nm in thecorner portion in the silicon nitride film of the present inventionhaving carbon introduced therein.

In other words, in the case of using the conventional silicon nitridefilm, it is necessary for the silicon nitride film before the RIE stepto have a thickness of 200 nm in order to ensure a thickness after theRIE step large enough to use the nitride film as a cap insulating film.In the case of using the silicon nitride film of the present invention,however, it is possible to decrease the thickness before the RIE step to160 nm.

As described above, the ninth embodiment of the present invention makesit possible to form a silicon nitride film having a permittivity lowerthan that of the conventional silicon nitride film and exhibiting aresistance to etching. It follows that a thin silicon nitride filmhaving a permittivity lower than that of the conventional siliconnitride film can be used so as to decrease the parasitic capacitance ofthe interlayer insulating film included in a semiconductor device.

How to decrease the parasitic capacitance of an IG-DRAM, which is a DRAMof the next era, will now be described specifically.

FIG. 30A is a cross sectional view of a DRAM using a silicon nitridefilm of the present invention. On the other hand, FIG. 30B is a crosssectional view of a DRAM using a conventional silicon nitride film.

In an actual semiconductor device, a plurality of wirings cross eachother in a complex fashion. Likewise, the electrode and the wiring crosseach other in a complex fashion. As a result, the generated electricfields are distributed in a complex fashion. Such being the situation,only an electrode arrangement contributing to the parasitic capacitanceis shown in the drawings. Also, those portions corresponding to theportions shown in FIGS. 25A to 25D are denoted by the reference numeralsused in FIGS. 25A to 25D. The structure shown in FIGS. 30A and 30Bincludes a source/drain diffusion layer 413 of an LDD structure, aninsulating film 414 on an upper portion of the gate, and gate side wallinsulating films 415 and 416.

The parasitic capacitance is generated between, for example, the gateelectrodes 402-404 and the metal wiring 410. In the present invention,the thin silicon nitride film 411 having a permittivity lower than thatof the conventional silicon nitride film is formed between the gateelectrode and the metal wiring, making it possible to sufficientlydecrease the parasitic capacitance.

FIGS. 30A and 30B cover the case where the distance between the gateelectrode and the metal wiring is large. In this case, if the pitch ofthe gate electrodes is made smaller, the effect produced by a lowerpermittivity and a smaller thickness of the silicon nitride film of thepresent invention is rendered more prominent.

Since it is possible to decrease the parasitic capacitance, to diminishthe capacitor area and to decrease the distances between the adjacentwirings and between the adjacent gate electrodes, the chip size can befinally made smaller. Also, since a so-called “RC delay resistance” isdiminished, the device characteristics can be improved.

On the other hand, the silicon nitride film 411 is formed in a thicknessof 200 nm in the conventional technique. The conventional siliconnitride film 411 is formed typically at 780° C. under a reactor innerpressure of 66.5 Pa, and DCS/ammonia flow rate ratio of 150/1500. Inthis case, the silicon nitride film 411 is formed at a rate of about 3.0nm/min. If the silicon nitride film 411 is formed at 780° C., however,the barrier metal film 409 fails to withstand the heat of the hightemperature, with the result that reaction takes place between the metalwiring 410 and the silicon substrate 401.

Originally, if the silicon nitride film 411 is formed at 780° C., adamage is done to the MOS transistor formed in advance, making itimpossible to use the MOS transistor.

It is certainly possible to lower the film-forming temperature to 700°C. in the conventional technique, too. However, where the film-formingtemperature is set at 700° C., the film-forming rate is 0.7 nm/min. Itfollows that about 5 hours are required for forming a cap siliconnitride film in a thickness of 200 nm.

In the actual process, required are the time for the temperature tobecome uniform and the purging time, with the result that about 9 hoursare required for forming the films in the entire process. What should benoted is that, even if a cap silicon nitride film is formed at arelatively high temperature of 700° C., the productivity is markedlylowered.

Under the thermal budget of such a relatively high temperature and along time, a Ti_(x)Si_(y) film formed at the bottom of the contact holeis agglomerated in a portion, leading to an increase in the contactresistance. Further, under the thermal budget noted above, the diffusionlayer once activated is inactivated again, or the diffusion layer isdiffused again so as to increase the resistance of the diffusion layer.

As described above, if the film-forming temperature is lowered in themethod of forming a silicon nitride film using dichlorosilane, a problemis generated that the productivity is markedly lowered. However, thepreset invention has made it possible to form a silicon nitride film ata high speed under low temperatures. In other words, the presentinvention has established a method of forming a silicon nitride filmused in a semiconductor device of the next era.

In the ninth embodiment of the present invention, the technical idea ofthe present invention was applied to formation of a cap silicon nitridefilm. However, the technical idea of the present invention can also beemployed for formation of the insulating film 414 on the upper portionof the gate and the gate side wall insulating films 415 and 416.

Also, in the ninth embodiment of the present invention, the technicalidea of the present invention was employed for lowering the RIE rate ofthe silicon nitride film. However, the technical idea of the presentinvention can also be employed for lowering the other etching rates. Forexample, it is also possible to lower the etching rate in the case wherea silicon nitride film is etched with a dilute hydrofluoric acid.

FIG. 31 is a graph showing the relationship between the carbonconcentration in a silicon nitride film and the etching rate when thesilicon nitride film is etched with a dilute hydrofluoric acid. Thedilute hydrofluoric acid used in this experiment was prepared bydiluting a 46% of concentrated hydrofluoric acid with water 200 times asmuch in volume as the concentrated hydrofluoric acid.

As apparent from the graph, the etching rate of the silicon nitride filmwhen etched with a dilute hydrofluoric acid can be decreased byintroducing carbon into the silicon nitride film. This implies thatsilicon nitride films can be made different from each other in etchingrate by controlling the carbon content of the silicon nitride film.

The particular phenomenon is positively utilized in, for example, adamascene metal gate process. Specifically, a silicon nitride film 501that does not contain carbon is formed as a dummy gate and a siliconnitride film 502 containing carbon is formed as a gate side wallinsulating film, as shown in FIG. 32A, followed by applying a wetetching with a dilute hydrofluoric acid solution so as to remove easilyand selectively the silicon nitride film 501, as shown in FIG. 32B.Incidentally, the structure shown in FIGS. 32A and 32B includes asilicon substrate 500, a gate insulating film 503, a source/draindiffusion layer 504 of an LDD structure, and an interlayer insulatingfilm 505.

Additional advantages and modifications will readily occur to thoseskilled in the art. Therefore, the invention in its broader aspects isnot limited to the specific details and representative embodiments shownand described herein. Accordingly, various modifications may be madewithout departing from the spirit or scope of the general inventiveconcept as defined by the appended claims and their equivalents.

What is claimed is:
 1. A method of manufacturing a semiconductor device,comprising the steps of: preparing a semiconductor substrate; andforming a silicon nitride insulation film on said semiconductorsubstrate by a low pressure chemical vapor deposition method using acompound having a Si—Si bond and a Si—Cl bond as a Si raw material,wherein said silicon nitride film is formed to cover the surfaces ofsaid semiconductor substrate and a gate electrode formed on thesemiconductor substrate, and said method further comprises the steps of:forming an interlayer insulating film on said silicon nitride film; andforming a through-hole extending through a portion of said interlayerinsulating film and silicon nitride film to reach the surface of thesemiconductor substrate.
 2. A method of manufacturing a semiconductordevice according to claim 1, wherein said silicon nitride film is formedto cover the surfaces of said semiconductor substrate and a gateelectrode formed on the semiconductor substrate, and said method furthercomprises the steps of: forming an interlayer insulating film on saidsilicon nitride film; and forming a through-hole extending through aportion of said interlayer insulating film and silicon nitride film toreach the surface of the semiconductor substrate.
 3. A method ofmanufacturing a semiconductor device according to claim 2 1, wherein theraw material of said silicon nitride film is represented by a generalformula Si_(n)Cl_(2+2−x)H_(x), where n is an integer not smaller than 2,and x is an integer not larger than 2n+1.
 4. A method of manufacturing asemiconductor device according to claim 1, wherein the said siliconnitride film is formed to a thickness of 10 nm or more.
 5. A method ofmanufacturing a semiconductor device according to claim 1, wherein afilm containing chlorine is formed on a side wall of a gate electrodeformed on the semiconductor substrate.
 6. A method of manufacturing asemiconductor device according to claim 5, wherein the film containingchlorine has an excess amount of silicon as compared to a stoichiometricratio of a Si₃N₄ film.
 7. A method of manufacturing a semiconductordevice according to claim 5, wherein the film formed on the side wall ofthe gate includes chlorine in a concentration of at least 4×10²⁰ cm⁻³.8. A method of manufacturing a semiconductor device according to claim5, wherein the gate electrode has a laminate structure including a metalgate layer.
 9. A method of manufacturing a semiconductor deviceaccording to claim 5, wherein the gate electrode is metal.
 10. A methodof manufacturing a semiconductor device according to claim 5, whereinthe silicon nitride film is formed to a thickness of 10 nm or more. 11.A method of manufacturing a semiconductor device according to claim 5,wherein a gate insulating film is formed between the semiconductorsubstrate and the gate electrode, and the gate insulating film is a highdielectric constant material.
 12. A method of manufacturing asemiconductor device according to claim 11, wherein the gate electrodecomprises Ti.
 13. A method of manufacturing a semiconductor deviceaccording to claim 5, wherein the silicon nitride insulation film has adensity not higher than 2.4 g/cm³.
 14. A method of manufacturing asemiconductor device according to claim 5, wherein the silicon nitrideinsulation film is formed at a temperature of 700° C. or less.
 15. Amethod of manufacturing a semiconductor device according to claim 5,wherein NH₃ is used as a nitrogen source for forming the silicon nitrideinsulation film.
 16. A method of manufacturing a semiconductor deviceaccording to claim 1, wherein the silicon nitride insulation film has anexcess amount of silicon as compared to a stoichiometric ratio of aSi₃N₄ film.
 17. A method of manufacturing a semiconductor deviceaccording to claim 1, wherein the silicon nitride film includes chlorinein a concentration of at least 4×10²⁰ cm⁻³.
 18. A method ofmanufacturing a semiconductor device according to claim 1, wherein thegate electrode has a laminate structure including a metal gate layer.19. A method of manufacturing a semiconductor device according to claim1, wherein the gate electrode is metal.
 20. A method of manufacturing asemiconductor device according to claim 1, wherein a gate insulatingfilm is formed between the semiconductor substrate and the gateelectrode, and the gate insulating film is a high dielectric constantmaterial.
 21. A method of manufacturing a semiconductor device accordingto claim 17, wherein the gate electrode comprises Ti.
 22. A method ofmanufacturing a semiconductor device according to claim 1, wherein thesilicon nitride insulation film has a density not higher than 2.4 g/cm³.23. A method of manufacturing a semiconductor device according to claim1, wherein the semiconductor substrate includes a copper wiring and thesilicon nitride insulation film is formed on a surface of the copperwiring.